Part 7 tutorial on Quartus and DE1-SoC board?

[Viggo-Avila]

I was curious since in the tutorials for part 7b, the generated files from the part 7a synthesis will be transferred into the FPGA and then ran there through the jupyter notebook. But since the board used is a pynq board then the jupyter notebook can be ran there, how can the part 7 tutorials be done for an intel board and quartus?

What method needs to be taken to transfer the bitfile onto the board and then run the testing there? Will it use OpenCL?

Also, in part 7a tutorial for the Intel board, will it just be the same steps but with the different board and part implementation?