Fix CVTSI2SS for recent update of Intel XED (#462)

* Fix CVTSI2SS for recent update of Intel XED

Note that it may be needed to build XED from the latest revision, rather
than using the cached build from docker images.

* CVTSI2SD is also changed

Author: kyechou

lib/Arch/X86/Semantics/CONVERT.cpp

@@ -333,18 +333,18 @@ IF_AVX(DEF_ISEL(VCVTSD2SS_XMMdq_XMMdq_XMMq) = VCVTSD2SS<V128>;)
 
 namespace {
 template <typename S2>
-DEF_SEM(CVTSI2SS, V128W dst_src1, S2 src2) {
-  auto src1_vec = FReadV32(dst_src1);
+DEF_SEM(CVTSI2SS, V128W dst, V128 src1, S2 src2) {
+  auto src1_vec = FReadV32(src1);
   auto conv_val = Float32(Signed(Read(src2)));
-  FWriteV32(dst_src1, FInsertV32(src1_vec, 0, conv_val));
+  FWriteV32(dst, FInsertV32(src1_vec, 0, conv_val));
   return memory;
 }
 
 template <typename S2>
-DEF_SEM(CVTSI2SD, V128W dst_src1, S2 src2) {
-  auto src1_vec = FReadV64(dst_src1);
+DEF_SEM(CVTSI2SD, V128W dst, V128 src1, S2 src2) {
+  auto src1_vec = FReadV64(src1);
   auto conv_val = Float64(Signed(Read(src2)));
-  FWriteV64(dst_src1, FInsertV64(src1_vec, 0, conv_val));
+  FWriteV64(dst, FInsertV64(src1_vec, 0, conv_val));
   return memory;
 }