diff --git a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender-tianma.dts b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender-tianma.dts
index f14e214921b46b..16fee469707de9 100644
--- a/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender-tianma.dts
+++ b/arch/arm64/boot/dts/qcom/sdm660-xiaomi-lavender-tianma.dts
@@ -16,23 +16,30 @@
 	status = "okay";
 
 	/* Novatek NT36672A touchscreen */
-	touchscreen@62 {
-		compatible = "novatek,nt36525";
-		reg = <0x62>;
-		vdd-supply = <&vreg_l11a_1p8>;
-		interrupt-parent = <&tlmm>;
-		interrupts = <67 IRQ_TYPE_EDGE_RISING>;
+	touchscreen@1 {
+		compatible = "novatek,nt36672a-ts";
+		reg = <0x1>;
+		iovcc-supply = <&vreg_l11a_1p8>;
+		interrupts-extended = <&tlmm 67 IRQ_TYPE_EDGE_RISING>;
+
+		// Fixme, I think the driver can only handle default state
 		pinctrl-names = "default", "sleep";
 		pinctrl-0 = <&ts_pins_active>;
 		pinctrl-1 = <&ts_int_sleep &ts_rst_sleep>;
-		reset-gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>;
+		reset-gpios = <&tlmm 66 GPIO_ACTIVE_LOW>;
+
+		// Maybe they are not used by the driver
 		touchscreen-size-x = <1080>;
 		touchscreen-size-y = <2340>;
 	};
 };
 
 &panel {
-	compatible = "tianma,nt36672a-xiaomi-lavender-simple";
+	compatible = "tianma,nt36672a-xiaomi-lavender";
+	vddio-supply = <&vreg_l11a_1p8>;
+	// There is no lcdb driver yet
+	// vsn-supply = <>;
+	// vsp-supply = <>
 };
 
 &tlmm {
diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gpu/drm/drm_panel.c
index c627e42a7ce704..870bf8d471ee9c 100644
--- a/drivers/gpu/drm/drm_panel.c
+++ b/drivers/gpu/drm/drm_panel.c
@@ -74,8 +74,9 @@ EXPORT_SYMBOL(drm_panel_init);
  * drm_panel_add - add a panel to the global registry
  * @panel: panel to add
  *
- * Add a panel to the global registry so that it can be looked up by display
- * drivers.
+ * Add a panel to the global registry so that it can be looked
+ * up by display drivers. The panel to be added must have been
+ * allocated by devm_drm_panel_alloc().
  */
 void drm_panel_add(struct drm_panel *panel)
 {
@@ -355,6 +356,93 @@ struct drm_panel *of_drm_find_panel(const struct device_node *np)
 }
 EXPORT_SYMBOL(of_drm_find_panel);
 
+static void __drm_panel_free(struct kref *kref)
+{
+	struct drm_panel *panel = container_of(kref, struct drm_panel, refcount);
+
+	kfree(panel->container);
+}
+
+/**
+ * drm_panel_get - Acquire a panel reference
+ * @panel: DRM panel
+ *
+ * This function increments the panel's refcount.
+ * Returns:
+ * Pointer to @panel
+ */
+struct drm_panel *drm_panel_get(struct drm_panel *panel)
+{
+	if (!panel)
+		return panel;
+
+	kref_get(&panel->refcount);
+
+	return panel;
+}
+EXPORT_SYMBOL(drm_panel_get);
+
+/**
+ * drm_panel_put - Release a panel reference
+ * @panel: DRM panel
+ *
+ * This function decrements the panel's reference count and frees the
+ * object if the reference count drops to zero.
+ */
+void drm_panel_put(struct drm_panel *panel)
+{
+	if (panel)
+		kref_put(&panel->refcount, __drm_panel_free);
+}
+EXPORT_SYMBOL(drm_panel_put);
+
+/**
+ * drm_panel_put_void - wrapper to drm_panel_put() taking a void pointer
+ *
+ * @data: pointer to @struct drm_panel, cast to a void pointer
+ *
+ * Wrapper of drm_panel_put() to be used when a function taking a void
+ * pointer is needed, for example as a devm action.
+ */
+static void drm_panel_put_void(void *data)
+{
+	struct drm_panel *panel = (struct drm_panel *)data;
+
+	drm_panel_put(panel);
+}
+
+void *__devm_drm_panel_alloc(struct device *dev, size_t size, size_t offset,
+			     const struct drm_panel_funcs *funcs,
+			     int connector_type)
+{
+	void *container;
+	struct drm_panel *panel;
+	int err;
+
+	if (!funcs) {
+		dev_warn(dev, "Missing funcs pointer\n");
+		return ERR_PTR(-EINVAL);
+	}
+
+	container = kzalloc(size, GFP_KERNEL);
+	if (!container)
+		return ERR_PTR(-ENOMEM);
+
+	panel = container + offset;
+	panel->container = container;
+	panel->funcs = funcs;
+	kref_init(&panel->refcount);
+
+	err = devm_add_action_or_reset(dev, drm_panel_put_void, panel);
+	if (err)
+		return ERR_PTR(err);
+
+	drm_panel_init(panel, dev, funcs, connector_type);
+
+	return container;
+}
+EXPORT_SYMBOL(__devm_drm_panel_alloc);
+
 /**
  * of_drm_get_panel_orientation - look up the orientation of the panel through
  * the "rotation" binding from a device tree node
diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index adb7e572519698..0091cc7b5c49ec 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -515,6 +515,16 @@ config DRM_PANEL_NOVATEK_NT36672A
 	  around the Novatek NT36672A display controller, such as some
 	  Tianma panels used in a few Xiaomi Poco F1 mobile phones.
 
+config DRM_PANEL_NOVATEK_NT36672A_TIANMAPLUS
+	tristate "Novatek NT36672A DSI panel"
+	depends on OF
+	depends on DRM_MIPI_DSI
+	depends on BACKLIGHT_CLASS_DEVICE
+	help
+	  Say Y here if you want to enable support for the panels built
+	  around the Novatek NT36672A display controller, such as some
+	  Tianma panels used in a few Xiaomi Poco F1 mobile phones.
+
 config DRM_PANEL_NOVATEK_NT36672E
 	tristate "Novatek NT36672E DSI panel"
 	depends on OF
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index ff9ac5dac6dc40..2435a1a5de15c0 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -51,6 +51,7 @@ obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35560) += panel-novatek-nt35560.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT35950) += panel-novatek-nt35950.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36523) += panel-novatek-nt36523.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672A) += panel-novatek-nt36672a.o
+obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672A_TIANMAPLUS) += panel-nt36672a-tianmaplus.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672E) += panel-novatek-nt36672e.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672_TIANMA_JASMINE) += panel-novatek-nt36672-tianma-jasmine.o
 obj-$(CONFIG_DRM_PANEL_NOVATEK_NT36672_TXD) += panel-novatek-nt36672-txd.o
diff --git a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
index c2abd20e0734bd..dfc6a4e19a7044 100644
--- a/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
+++ b/drivers/gpu/drm/panel/panel-novatek-nt36672a.c
@@ -28,10 +28,6 @@
 
 #include <video/mipi_display.h>
 
-struct nt36672a_panel_cmd {
-	const char data[2];
-};
-
 static const char * const nt36672a_regulator_names[] = {
 	"vddio",
 	"vddpos",
@@ -54,14 +50,10 @@ struct nt36672a_panel_desc {
 	unsigned long mode_flags;
 	enum mipi_dsi_pixel_format format;
 	unsigned int lanes;
+	enum gpiod_flags reset_gpio_flags;
 
-	unsigned int num_on_cmds_1;
-	const struct nt36672a_panel_cmd *on_cmds_1;
-	unsigned int num_on_cmds_2;
-	const struct nt36672a_panel_cmd *on_cmds_2;
-
-	unsigned int num_off_cmds;
-	const struct nt36672a_panel_cmd *off_cmds;
+	int (*init_cmds)(struct drm_panel *panel);
+	int (*off_cmds)(struct drm_panel *panel);
 };
 
 struct nt36672a_panel {
@@ -79,23 +71,404 @@ static inline struct nt36672a_panel *to_nt36672a_panel(struct drm_panel *panel)
 	return container_of(panel, struct nt36672a_panel, base);
 }
 
-static int nt36672a_send_cmds(struct drm_panel *panel, const struct nt36672a_panel_cmd *cmds,
-			      int num)
+static int tianma_beryllium_init_cmds(struct drm_panel *panel)
 {
 	struct nt36672a_panel *pinfo = to_nt36672a_panel(panel);
-	unsigned int i;
-	int err;
+	struct mipi_dsi_multi_context dsi_ctx = { .dsi = pinfo->link };
 
-	for (i = 0; i < num; i++) {
-		const struct nt36672a_panel_cmd *cmd = &cmds[i];
+	/* send first part of init cmds (.on_cmds_1) */
+	/* skin enhancement mode */
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x22);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x00, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0xC0);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x02, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x03, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x04, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x07, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x08, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x09, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0A, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0B, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0C, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0D, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0E, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x0F, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x60);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x13, 0x70);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x14, 0x58);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x68);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x78);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x17, 0x77);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x39);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x19, 0x2D);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1A, 0x2E);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1B, 0x32);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1C, 0x37);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1D, 0x3A);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1E, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1F, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x20, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x21, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x22, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x23, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x24, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x25, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x26, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x27, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2D, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2F, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3A, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3B, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3D, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3F, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x42, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x43, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x44, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x46, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4A, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4B, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4C, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4D, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4E, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4F, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x54, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0xFE);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x56, 0x77);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0xCD);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0xD0);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5A, 0xD0);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5B, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5C, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5D, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5E, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5F, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x69, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6A, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6B, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6C, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6D, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6E, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x6F, 0x50);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x70, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x71, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x72, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x73, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x74, 0x06);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x75, 0x0C);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x76, 0x03);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x77, 0x09);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x0F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x79, 0x68);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7A, 0x88);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7C, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7D, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7E, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x7F, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x80, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x81, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x83, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x84, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x85, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x86, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x87, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x88, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x89, 0x91);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8A, 0x98);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8B, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8C, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8D, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8E, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8F, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x90, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x91, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x92, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x93, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x94, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x95, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x96, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x97, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x98, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x99, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x9A, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x9B, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x9C, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x9D, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x9E, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x9F, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xA0, 0x8A);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xA2, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xA6, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xA7, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xA9, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xAA, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xAB, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xAC, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xAD, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xAE, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xAF, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB7, 0x76);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB8, 0x76);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xB9, 0x05);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xBA, 0x0D);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xBB, 0x14);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xBC, 0x0F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xBD, 0x18);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xBE, 0x1F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xBF, 0x05);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xC0, 0x0D);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xC1, 0x14);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xC2, 0x03);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xC3, 0x07);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xC4, 0x0A);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xC5, 0xA0);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xC6, 0x55);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xC7, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xC8, 0x39);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xC9, 0x44);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xCA, 0x12);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xCD, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xDB, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xDC, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xDD, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE0, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE1, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE2, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE3, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE4, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE5, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE6, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE7, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE8, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xE9, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xEA, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xEB, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xEC, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xED, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xEE, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xEF, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xF0, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xF1, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xF2, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xF3, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xF4, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xF5, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xF6, 0x40);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFB, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x23);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFB, 0x01);
+	/* dimming enable */
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x01, 0x84);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x2D);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x06, 0x00);
+	 /* resolution 1080*2246 */
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x12, 0x7B);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x15, 0x6F);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x16, 0x0B);
+	 /* UI mode */
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x0A);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x30, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x31, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x32, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x33, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x34, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x35, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x36, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x37, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x38, 0xFC);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x39, 0xF8);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3A, 0xF4);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3B, 0xF1);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3D, 0xEE);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x3F, 0xEB);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x40, 0xE8);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x41, 0xE5);
+	 /* STILL mode */
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2A, 0x13);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x45, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x46, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x47, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x48, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x49, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4A, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4B, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4C, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4D, 0xED);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4E, 0xD5);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x4F, 0xBF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x50, 0xA6);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0x96);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x52, 0x86);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x76);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x54, 0x66);
+	 /* MOVING mode */
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x2B, 0x0E);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x58, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x59, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5A, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5B, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5C, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5D, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5E, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x5F, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x60, 0xF6);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x61, 0xEA);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x62, 0xE1);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x63, 0xD8);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x64, 0xCE);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x65, 0xC3);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x66, 0xBA);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x67, 0xB3);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x25);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFB, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x04);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x26);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFB, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x1C, 0xAF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x10);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFB, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x51, 0xFF);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x53, 0x24);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x55, 0x00);
+
+	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
 
-		err = mipi_dsi_dcs_write(pinfo->link, cmd->data[0], cmd->data + 1, 1);
+	/* 0x46 = 70 ms delay */
+	mipi_dsi_msleep(&dsi_ctx, 70);
 
-		if (err < 0)
-			return err;
-	}
+	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
 
-	return 0;
+	/* Send rest of the init cmds (.on_cmds_2) */
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x24);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFB, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xC3, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xC4, 0x54);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x10);
+
+	mipi_dsi_msleep(&dsi_ctx, 120);
+
+	return dsi_ctx.accum_err;
+}
+
+/* Tianma-beryllium specific handler with specific delays */
+static int tianma_beryllium_off_cmds(struct drm_panel *panel)
+{
+	struct nt36672a_panel *pinfo = to_nt36672a_panel(panel);
+	struct mipi_dsi_multi_context dsi_ctx = { .dsi = pinfo->link };
+
+	/* send off cmds */
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x24);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFB, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xC3, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xFF, 0x10);
+
+	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
+
+	/* 120ms delay required here as per DCS spec */
+	mipi_dsi_msleep(&dsi_ctx, 120);
+
+	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
+
+	/* 0x3C = 60ms delay */
+	mipi_dsi_msleep(&dsi_ctx, 60);
+
+	return dsi_ctx.accum_err;
+}
+
+static int tianma_lavender_init_cmds(struct drm_panel *panel)
+{
+	struct nt36672a_panel *pinfo = to_nt36672a_panel(panel);
+	struct mipi_dsi_multi_context dsi_ctx = { .dsi = pinfo->link };
+
+	pinfo->link->mode_flags |= MIPI_DSI_MODE_LPM;
+
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x25);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x96);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x04);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x20);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x24);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x13);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x84, 0x31);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x88, 0x13);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8a, 0x31);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8e, 0xe4);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8f, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x90, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x26);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_READ_PPS_CONTINUE, 0x12);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xaa, 0x10);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xae, 0x8a);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x10);
+
+	// mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x00); // MIPI_DCS_EXIT_SLEEP_MODE
+	mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx);
+	mipi_dsi_msleep(&dsi_ctx, 80);
+
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x01);
+	mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x03, 0x04);
+	mipi_dsi_dcs_set_display_brightness_multi(&dsi_ctx, 0x00b8);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x2c);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
+
+	// mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x00); // MIPI_DCS_SET_DISPLAY_ON
+	mipi_dsi_dcs_set_display_on_multi(&dsi_ctx);
+
+	return dsi_ctx.accum_err;
+}
+
+static int tianma_lavender_off_cmds(struct drm_panel *panel)
+{
+	struct nt36672a_panel *pinfo = to_nt36672a_panel(panel);
+	struct mipi_dsi_multi_context dsi_ctx = { .dsi = pinfo->link };
+
+	pinfo->link->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+	mipi_dsi_dcs_set_display_off_multi(&dsi_ctx);
+	mipi_dsi_msleep(&dsi_ctx, 20);
+	mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx);
+	mipi_dsi_msleep(&dsi_ctx, 120);
+
+	return dsi_ctx.accum_err;
 }
 
 static int nt36672a_panel_power_off(struct drm_panel *panel)
@@ -115,28 +488,15 @@ static int nt36672a_panel_power_off(struct drm_panel *panel)
 static int nt36672a_panel_unprepare(struct drm_panel *panel)
 {
 	struct nt36672a_panel *pinfo = to_nt36672a_panel(panel);
-	int ret;
+	int ret = 0;
 
 	/* send off cmds */
-	ret = nt36672a_send_cmds(panel, pinfo->desc->off_cmds,
-				 pinfo->desc->num_off_cmds);
-
-	if (ret < 0)
-		dev_err(panel->dev, "failed to send DCS off cmds: %d\n", ret);
-
-	ret = mipi_dsi_dcs_set_display_off(pinfo->link);
-	if (ret < 0)
-		dev_err(panel->dev, "set_display_off cmd failed ret = %d\n", ret);
-
-	/* 120ms delay required here as per DCS spec */
-	msleep(120);
-
-	ret = mipi_dsi_dcs_enter_sleep_mode(pinfo->link);
-	if (ret < 0)
-		dev_err(panel->dev, "enter_sleep cmd failed ret = %d\n", ret);
-
-	/* 0x3C = 60ms delay */
-	msleep(60);
+	if (pinfo->desc->off_cmds) {
+		ret = pinfo->desc->off_cmds(panel);
+		if (ret < 0)
+			dev_err(panel->dev, "failed to send DCS off cmds: %d\n", ret);
+		return ret;
+	}
 
 	ret = nt36672a_panel_power_off(panel);
 	if (ret < 0)
@@ -176,41 +536,12 @@ static int nt36672a_panel_prepare(struct drm_panel *panel)
 	if (err < 0)
 		goto poweroff;
 
-	/* send first part of init cmds */
-	err = nt36672a_send_cmds(panel, pinfo->desc->on_cmds_1,
-				 pinfo->desc->num_on_cmds_1);
-
-	if (err < 0) {
-		dev_err(panel->dev, "failed to send DCS Init 1st Code: %d\n", err);
-		goto poweroff;
-	}
-
-	err = mipi_dsi_dcs_exit_sleep_mode(pinfo->link);
-	if (err < 0) {
-		dev_err(panel->dev, "failed to exit sleep mode: %d\n", err);
-		goto poweroff;
-	}
-
-	/* 0x46 = 70 ms delay */
-	msleep(70);
-
-	err = mipi_dsi_dcs_set_display_on(pinfo->link);
-	if (err < 0) {
-		dev_err(panel->dev, "failed to Set Display ON: %d\n", err);
-		goto poweroff;
-	}
-
-	/* Send rest of the init cmds */
-	err = nt36672a_send_cmds(panel, pinfo->desc->on_cmds_2,
-				 pinfo->desc->num_on_cmds_2);
-
+	err = pinfo->desc->init_cmds(panel);
 	if (err < 0) {
-		dev_err(panel->dev, "failed to send DCS Init 2nd Code: %d\n", err);
+		dev_err(panel->dev, "Failed to init panel!\n");
 		goto poweroff;
 	}
 
-	msleep(120);
-
 	return 0;
 
 poweroff:
@@ -247,311 +578,6 @@ static const struct drm_panel_funcs panel_funcs = {
 	.get_modes = nt36672a_panel_get_modes,
 };
 
-static const struct nt36672a_panel_cmd tianma_fhd_video_on_cmds_1[] = {
-	/* skin enhancement mode */
-	{ .data = {0xFF, 0x22} },
-	{ .data = {0x00, 0x40} },
-	{ .data = {0x01, 0xC0} },
-	{ .data = {0x02, 0x40} },
-	{ .data = {0x03, 0x40} },
-	{ .data = {0x04, 0x40} },
-	{ .data = {0x05, 0x40} },
-	{ .data = {0x06, 0x40} },
-	{ .data = {0x07, 0x40} },
-	{ .data = {0x08, 0x40} },
-	{ .data = {0x09, 0x40} },
-	{ .data = {0x0A, 0x40} },
-	{ .data = {0x0B, 0x40} },
-	{ .data = {0x0C, 0x40} },
-	{ .data = {0x0D, 0x40} },
-	{ .data = {0x0E, 0x40} },
-	{ .data = {0x0F, 0x40} },
-	{ .data = {0x10, 0x40} },
-	{ .data = {0x11, 0x50} },
-	{ .data = {0x12, 0x60} },
-	{ .data = {0x13, 0x70} },
-	{ .data = {0x14, 0x58} },
-	{ .data = {0x15, 0x68} },
-	{ .data = {0x16, 0x78} },
-	{ .data = {0x17, 0x77} },
-	{ .data = {0x18, 0x39} },
-	{ .data = {0x19, 0x2D} },
-	{ .data = {0x1A, 0x2E} },
-	{ .data = {0x1B, 0x32} },
-	{ .data = {0x1C, 0x37} },
-	{ .data = {0x1D, 0x3A} },
-	{ .data = {0x1E, 0x40} },
-	{ .data = {0x1F, 0x40} },
-	{ .data = {0x20, 0x40} },
-	{ .data = {0x21, 0x40} },
-	{ .data = {0x22, 0x40} },
-	{ .data = {0x23, 0x40} },
-	{ .data = {0x24, 0x40} },
-	{ .data = {0x25, 0x40} },
-	{ .data = {0x26, 0x40} },
-	{ .data = {0x27, 0x40} },
-	{ .data = {0x28, 0x40} },
-	{ .data = {0x2D, 0x00} },
-	{ .data = {0x2F, 0x40} },
-	{ .data = {0x30, 0x40} },
-	{ .data = {0x31, 0x40} },
-	{ .data = {0x32, 0x40} },
-	{ .data = {0x33, 0x40} },
-	{ .data = {0x34, 0x40} },
-	{ .data = {0x35, 0x40} },
-	{ .data = {0x36, 0x40} },
-	{ .data = {0x37, 0x40} },
-	{ .data = {0x38, 0x40} },
-	{ .data = {0x39, 0x40} },
-	{ .data = {0x3A, 0x40} },
-	{ .data = {0x3B, 0x40} },
-	{ .data = {0x3D, 0x40} },
-	{ .data = {0x3F, 0x40} },
-	{ .data = {0x40, 0x40} },
-	{ .data = {0x41, 0x40} },
-	{ .data = {0x42, 0x40} },
-	{ .data = {0x43, 0x40} },
-	{ .data = {0x44, 0x40} },
-	{ .data = {0x45, 0x40} },
-	{ .data = {0x46, 0x40} },
-	{ .data = {0x47, 0x40} },
-	{ .data = {0x48, 0x40} },
-	{ .data = {0x49, 0x40} },
-	{ .data = {0x4A, 0x40} },
-	{ .data = {0x4B, 0x40} },
-	{ .data = {0x4C, 0x40} },
-	{ .data = {0x4D, 0x40} },
-	{ .data = {0x4E, 0x40} },
-	{ .data = {0x4F, 0x40} },
-	{ .data = {0x50, 0x40} },
-	{ .data = {0x51, 0x40} },
-	{ .data = {0x52, 0x40} },
-	{ .data = {0x53, 0x01} },
-	{ .data = {0x54, 0x01} },
-	{ .data = {0x55, 0xFE} },
-	{ .data = {0x56, 0x77} },
-	{ .data = {0x58, 0xCD} },
-	{ .data = {0x59, 0xD0} },
-	{ .data = {0x5A, 0xD0} },
-	{ .data = {0x5B, 0x50} },
-	{ .data = {0x5C, 0x50} },
-	{ .data = {0x5D, 0x50} },
-	{ .data = {0x5E, 0x50} },
-	{ .data = {0x5F, 0x50} },
-	{ .data = {0x60, 0x50} },
-	{ .data = {0x61, 0x50} },
-	{ .data = {0x62, 0x50} },
-	{ .data = {0x63, 0x50} },
-	{ .data = {0x64, 0x50} },
-	{ .data = {0x65, 0x50} },
-	{ .data = {0x66, 0x50} },
-	{ .data = {0x67, 0x50} },
-	{ .data = {0x68, 0x50} },
-	{ .data = {0x69, 0x50} },
-	{ .data = {0x6A, 0x50} },
-	{ .data = {0x6B, 0x50} },
-	{ .data = {0x6C, 0x50} },
-	{ .data = {0x6D, 0x50} },
-	{ .data = {0x6E, 0x50} },
-	{ .data = {0x6F, 0x50} },
-	{ .data = {0x70, 0x07} },
-	{ .data = {0x71, 0x00} },
-	{ .data = {0x72, 0x00} },
-	{ .data = {0x73, 0x00} },
-	{ .data = {0x74, 0x06} },
-	{ .data = {0x75, 0x0C} },
-	{ .data = {0x76, 0x03} },
-	{ .data = {0x77, 0x09} },
-	{ .data = {0x78, 0x0F} },
-	{ .data = {0x79, 0x68} },
-	{ .data = {0x7A, 0x88} },
-	{ .data = {0x7C, 0x80} },
-	{ .data = {0x7D, 0x80} },
-	{ .data = {0x7E, 0x80} },
-	{ .data = {0x7F, 0x00} },
-	{ .data = {0x80, 0x00} },
-	{ .data = {0x81, 0x00} },
-	{ .data = {0x83, 0x01} },
-	{ .data = {0x84, 0x00} },
-	{ .data = {0x85, 0x80} },
-	{ .data = {0x86, 0x80} },
-	{ .data = {0x87, 0x80} },
-	{ .data = {0x88, 0x40} },
-	{ .data = {0x89, 0x91} },
-	{ .data = {0x8A, 0x98} },
-	{ .data = {0x8B, 0x80} },
-	{ .data = {0x8C, 0x80} },
-	{ .data = {0x8D, 0x80} },
-	{ .data = {0x8E, 0x80} },
-	{ .data = {0x8F, 0x80} },
-	{ .data = {0x90, 0x80} },
-	{ .data = {0x91, 0x80} },
-	{ .data = {0x92, 0x80} },
-	{ .data = {0x93, 0x80} },
-	{ .data = {0x94, 0x80} },
-	{ .data = {0x95, 0x80} },
-	{ .data = {0x96, 0x80} },
-	{ .data = {0x97, 0x80} },
-	{ .data = {0x98, 0x80} },
-	{ .data = {0x99, 0x80} },
-	{ .data = {0x9A, 0x80} },
-	{ .data = {0x9B, 0x80} },
-	{ .data = {0x9C, 0x80} },
-	{ .data = {0x9D, 0x80} },
-	{ .data = {0x9E, 0x80} },
-	{ .data = {0x9F, 0x80} },
-	{ .data = {0xA0, 0x8A} },
-	{ .data = {0xA2, 0x80} },
-	{ .data = {0xA6, 0x80} },
-	{ .data = {0xA7, 0x80} },
-	{ .data = {0xA9, 0x80} },
-	{ .data = {0xAA, 0x80} },
-	{ .data = {0xAB, 0x80} },
-	{ .data = {0xAC, 0x80} },
-	{ .data = {0xAD, 0x80} },
-	{ .data = {0xAE, 0x80} },
-	{ .data = {0xAF, 0x80} },
-	{ .data = {0xB7, 0x76} },
-	{ .data = {0xB8, 0x76} },
-	{ .data = {0xB9, 0x05} },
-	{ .data = {0xBA, 0x0D} },
-	{ .data = {0xBB, 0x14} },
-	{ .data = {0xBC, 0x0F} },
-	{ .data = {0xBD, 0x18} },
-	{ .data = {0xBE, 0x1F} },
-	{ .data = {0xBF, 0x05} },
-	{ .data = {0xC0, 0x0D} },
-	{ .data = {0xC1, 0x14} },
-	{ .data = {0xC2, 0x03} },
-	{ .data = {0xC3, 0x07} },
-	{ .data = {0xC4, 0x0A} },
-	{ .data = {0xC5, 0xA0} },
-	{ .data = {0xC6, 0x55} },
-	{ .data = {0xC7, 0xFF} },
-	{ .data = {0xC8, 0x39} },
-	{ .data = {0xC9, 0x44} },
-	{ .data = {0xCA, 0x12} },
-	{ .data = {0xCD, 0x80} },
-	{ .data = {0xDB, 0x80} },
-	{ .data = {0xDC, 0x80} },
-	{ .data = {0xDD, 0x80} },
-	{ .data = {0xE0, 0x80} },
-	{ .data = {0xE1, 0x80} },
-	{ .data = {0xE2, 0x80} },
-	{ .data = {0xE3, 0x80} },
-	{ .data = {0xE4, 0x80} },
-	{ .data = {0xE5, 0x40} },
-	{ .data = {0xE6, 0x40} },
-	{ .data = {0xE7, 0x40} },
-	{ .data = {0xE8, 0x40} },
-	{ .data = {0xE9, 0x40} },
-	{ .data = {0xEA, 0x40} },
-	{ .data = {0xEB, 0x40} },
-	{ .data = {0xEC, 0x40} },
-	{ .data = {0xED, 0x40} },
-	{ .data = {0xEE, 0x40} },
-	{ .data = {0xEF, 0x40} },
-	{ .data = {0xF0, 0x40} },
-	{ .data = {0xF1, 0x40} },
-	{ .data = {0xF2, 0x40} },
-	{ .data = {0xF3, 0x40} },
-	{ .data = {0xF4, 0x40} },
-	{ .data = {0xF5, 0x40} },
-	{ .data = {0xF6, 0x40} },
-	{ .data = {0xFB, 0x1} },
-	{ .data = {0xFF, 0x23} },
-	{ .data = {0xFB, 0x01} },
-	/* dimming enable */
-	{ .data = {0x01, 0x84} },
-	{ .data = {0x05, 0x2D} },
-	{ .data = {0x06, 0x00} },
-	 /* resolution 1080*2246 */
-	{ .data = {0x11, 0x01} },
-	{ .data = {0x12, 0x7B} },
-	{ .data = {0x15, 0x6F} },
-	{ .data = {0x16, 0x0B} },
-	 /* UI mode */
-	{ .data = {0x29, 0x0A} },
-	{ .data = {0x30, 0xFF} },
-	{ .data = {0x31, 0xFF} },
-	{ .data = {0x32, 0xFF} },
-	{ .data = {0x33, 0xFF} },
-	{ .data = {0x34, 0xFF} },
-	{ .data = {0x35, 0xFF} },
-	{ .data = {0x36, 0xFF} },
-	{ .data = {0x37, 0xFF} },
-	{ .data = {0x38, 0xFC} },
-	{ .data = {0x39, 0xF8} },
-	{ .data = {0x3A, 0xF4} },
-	{ .data = {0x3B, 0xF1} },
-	{ .data = {0x3D, 0xEE} },
-	{ .data = {0x3F, 0xEB} },
-	{ .data = {0x40, 0xE8} },
-	{ .data = {0x41, 0xE5} },
-	 /* STILL mode */
-	{ .data = {0x2A, 0x13} },
-	{ .data = {0x45, 0xFF} },
-	{ .data = {0x46, 0xFF} },
-	{ .data = {0x47, 0xFF} },
-	{ .data = {0x48, 0xFF} },
-	{ .data = {0x49, 0xFF} },
-	{ .data = {0x4A, 0xFF} },
-	{ .data = {0x4B, 0xFF} },
-	{ .data = {0x4C, 0xFF} },
-	{ .data = {0x4D, 0xED} },
-	{ .data = {0x4E, 0xD5} },
-	{ .data = {0x4F, 0xBF} },
-	{ .data = {0x50, 0xA6} },
-	{ .data = {0x51, 0x96} },
-	{ .data = {0x52, 0x86} },
-	{ .data = {0x53, 0x76} },
-	{ .data = {0x54, 0x66} },
-	 /* MOVING mode */
-	{ .data = {0x2B, 0x0E} },
-	{ .data = {0x58, 0xFF} },
-	{ .data = {0x59, 0xFF} },
-	{ .data = {0x5A, 0xFF} },
-	{ .data = {0x5B, 0xFF} },
-	{ .data = {0x5C, 0xFF} },
-	{ .data = {0x5D, 0xFF} },
-	{ .data = {0x5E, 0xFF} },
-	{ .data = {0x5F, 0xFF} },
-	{ .data = {0x60, 0xF6} },
-	{ .data = {0x61, 0xEA} },
-	{ .data = {0x62, 0xE1} },
-	{ .data = {0x63, 0xD8} },
-	{ .data = {0x64, 0xCE} },
-	{ .data = {0x65, 0xC3} },
-	{ .data = {0x66, 0xBA} },
-	{ .data = {0x67, 0xB3} },
-	{ .data = {0xFF, 0x25} },
-	{ .data = {0xFB, 0x01} },
-	{ .data = {0x05, 0x04} },
-	{ .data = {0xFF, 0x26} },
-	{ .data = {0xFB, 0x01} },
-	{ .data = {0x1C, 0xAF} },
-	{ .data = {0xFF, 0x10} },
-	{ .data = {0xFB, 0x01} },
-	{ .data = {0x51, 0xFF} },
-	{ .data = {0x53, 0x24} },
-	{ .data = {0x55, 0x00} },
-};
-
-static const struct nt36672a_panel_cmd tianma_fhd_video_on_cmds_2[] = {
-	{ .data = {0xFF, 0x24} },
-	{ .data = {0xFB, 0x01} },
-	{ .data = {0xC3, 0x01} },
-	{ .data = {0xC4, 0x54} },
-	{ .data = {0xFF, 0x10} },
-};
-
-static const struct nt36672a_panel_cmd tianma_fhd_video_off_cmds[] = {
-	{ .data = {0xFF, 0x24} },
-	{ .data = {0xFB, 0x01} },
-	{ .data = {0xC3, 0x01} },
-	{ .data = {0xFF, 0x10} },
-};
-
 static const struct drm_display_mode tianma_fhd_video_panel_default_mode = {
 	.clock		= 161331,
 
@@ -580,12 +606,41 @@ static const struct nt36672a_panel_desc tianma_fhd_video_panel_desc = {
 			| MIPI_DSI_MODE_VIDEO_BURST,
 	.format = MIPI_DSI_FMT_RGB888,
 	.lanes = 4,
-	.on_cmds_1 = tianma_fhd_video_on_cmds_1,
-	.num_on_cmds_1 = ARRAY_SIZE(tianma_fhd_video_on_cmds_1),
-	.on_cmds_2 = tianma_fhd_video_on_cmds_2,
-	.num_on_cmds_2 = ARRAY_SIZE(tianma_fhd_video_on_cmds_2),
-	.off_cmds = tianma_fhd_video_off_cmds,
-	.num_off_cmds = ARRAY_SIZE(tianma_fhd_video_off_cmds),
+	.reset_gpio_flags = GPIOD_OUT_LOW,
+
+	.init_cmds = tianma_beryllium_init_cmds,
+	.off_cmds = tianma_beryllium_off_cmds,
+};
+
+static const struct drm_display_mode tianma_lavender_panel_default_mode = {
+	.clock = (1080 + 90 + 2 + 120) * (2340 + 10 + 3 + 8) * 60 / 1000,
+	.hdisplay = 1080,
+	.hsync_start = 1080 + 90,
+	.hsync_end = 1080 + 90 + 2,
+	.htotal = 1080 + 90 + 2 + 120,
+	.vdisplay = 2340,
+	.vsync_start = 2340 + 10,
+	.vsync_end = 2340 + 10 + 3,
+	.vtotal = 2340 + 10 + 3 + 8,
+	.width_mm = 67,
+	.height_mm = 145,
+	.type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED,
+};
+
+static const struct nt36672a_panel_desc tianma_lavender_panel_desc = {
+	.display_mode = &tianma_lavender_panel_default_mode,
+
+	.width_mm = 67,
+	.height_mm = 145,
+
+	.mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			MIPI_DSI_CLOCK_NON_CONTINUOUS,
+	.format = MIPI_DSI_FMT_RGB888,
+	.lanes = 4,
+	.reset_gpio_flags = GPIOD_OUT_HIGH,
+
+	.init_cmds = tianma_lavender_init_cmds,
+	.off_cmds = tianma_lavender_off_cmds,
 };
 
 static int nt36672a_panel_add(struct nt36672a_panel *pinfo)
@@ -603,13 +658,15 @@ static int nt36672a_panel_add(struct nt36672a_panel *pinfo)
 	if (ret < 0)
 		return dev_err_probe(dev, ret, "failed to get regulators\n");
 
-	pinfo->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
+	pinfo->reset_gpio = devm_gpiod_get(dev, "reset", pinfo->desc->reset_gpio_flags);
 	if (IS_ERR(pinfo->reset_gpio))
 		return dev_err_probe(dev, PTR_ERR(pinfo->reset_gpio),
 				     "failed to get reset gpio from DT\n");
 
 	drm_panel_init(&pinfo->base, dev, &panel_funcs, DRM_MODE_CONNECTOR_DSI);
 
+	pinfo->base.prepare_prev_first = true;
+
 	ret = drm_panel_of_backlight(&pinfo->base);
 	if (ret)
 		return dev_err_probe(dev, ret, "Failed to get backlight\n");
@@ -665,6 +722,7 @@ static void nt36672a_panel_remove(struct mipi_dsi_device *dsi)
 
 static const struct of_device_id tianma_fhd_video_of_match[] = {
 	{ .compatible = "tianma,fhd-video", .data = &tianma_fhd_video_panel_desc },
+	{ .compatible = "tianma,nt36672a-xiaomi-lavender", .data = &tianma_lavender_panel_desc },
 	{ },
 };
 MODULE_DEVICE_TABLE(of, tianma_fhd_video_of_match);
diff --git a/drivers/gpu/drm/panel/panel-nt36672a-tianmaplus.c b/drivers/gpu/drm/panel/panel-nt36672a-tianmaplus.c
new file mode 100644
index 00000000000000..905b6ce15a3a80
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-nt36672a-tianmaplus.c
@@ -0,0 +1,252 @@
+// SPDX-License-Identifier: GPL-2.0-only
+// Copyright (c) 2025 FIXME
+// Generated with linux-mdss-dsi-panel-driver-generator from vendor device tree:
+//   Copyright (c) 2013, The Linux Foundation. All rights reserved. (FIXME)
+
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/mod_devicetable.h>
+#include <linux/module.h>
+#include <linux/regulator/consumer.h>
+
+#include <video/mipi_display.h>
+
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+#include <drm/drm_probe_helper.h>
+
+struct nt36672a_tianmaplus {
+	struct drm_panel panel;
+	struct mipi_dsi_device *dsi;
+	struct regulator_bulk_data *supplies;
+	struct gpio_desc *reset_gpio;
+};
+
+static const struct regulator_bulk_data nt36672a_tianmaplus_supplies[] = {
+	{ .supply = "vddio" },
+	{ .supply = "vsn" },
+	{ .supply = "vsp" },
+};
+
+static inline
+struct nt36672a_tianmaplus *to_nt36672a_tianmaplus(struct drm_panel *panel)
+{
+	return container_of(panel, struct nt36672a_tianmaplus, panel);
+}
+
+static void nt36672a_tianmaplus_reset(struct nt36672a_tianmaplus *ctx)
+{
+	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+	usleep_range(1000, 2000);
+	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+	usleep_range(5000, 6000);
+	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+	usleep_range(15000, 16000);
+}
+
+static int nt36672a_tianmaplus_on(struct nt36672a_tianmaplus *ctx)
+{
+	struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+	ctx->dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x25);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x18, 0x96);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x05, 0x04);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x20);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x78, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x24);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x82, 0x13);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x84, 0x31);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x88, 0x13);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8a, 0x31);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8e, 0xe4);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x8f, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x90, 0x80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x26);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xfb, 0x01);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_READ_PPS_CONTINUE,
+				     0x12);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xaa, 0x10);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xae, 0x8a);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xff, 0x10);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x11, 0x00);
+	mipi_dsi_msleep(&dsi_ctx, 80);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0xb0, 0x01);
+	mipi_dsi_dcs_set_tear_on_multi(&dsi_ctx, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x68, 0x03, 0x04);
+	mipi_dsi_dcs_set_display_brightness_multi(&dsi_ctx, 0x00b8);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_CONTROL_DISPLAY,
+				     0x2c);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, MIPI_DCS_WRITE_POWER_SAVE, 0x00);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x29, 0x00);
+
+	return dsi_ctx.accum_err;
+}
+
+static int nt36672a_tianmaplus_off(struct nt36672a_tianmaplus *ctx)
+{
+	struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi };
+
+	ctx->dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x28, 0x00); // MIPI_DCS_SET_DISPLAY_OFF
+	mipi_dsi_msleep(&dsi_ctx, 20);
+	mipi_dsi_dcs_write_seq_multi(&dsi_ctx, 0x10, 0x00); // MIPI_DCS_ENTER_SLEEP_MODE
+	mipi_dsi_msleep(&dsi_ctx, 120);
+
+	return dsi_ctx.accum_err;
+}
+
+static int nt36672a_tianmaplus_prepare(struct drm_panel *panel)
+{
+	struct nt36672a_tianmaplus *ctx = to_nt36672a_tianmaplus(panel);
+	struct device *dev = &ctx->dsi->dev;
+	int ret;
+
+	ret = regulator_bulk_enable(ARRAY_SIZE(nt36672a_tianmaplus_supplies), ctx->supplies);
+	if (ret < 0) {
+		dev_err(dev, "Failed to enable regulators: %d\n", ret);
+		return ret;
+	}
+
+	nt36672a_tianmaplus_reset(ctx);
+
+	ret = nt36672a_tianmaplus_on(ctx);
+	if (ret < 0) {
+		dev_err(dev, "Failed to initialize panel: %d\n", ret);
+		gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+		regulator_bulk_disable(ARRAY_SIZE(nt36672a_tianmaplus_supplies), ctx->supplies);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int nt36672a_tianmaplus_unprepare(struct drm_panel *panel)
+{
+	struct nt36672a_tianmaplus *ctx = to_nt36672a_tianmaplus(panel);
+	struct device *dev = &ctx->dsi->dev;
+	int ret;
+
+	ret = nt36672a_tianmaplus_off(ctx);
+	if (ret < 0)
+		dev_err(dev, "Failed to un-initialize panel: %d\n", ret);
+
+	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+	regulator_bulk_disable(ARRAY_SIZE(nt36672a_tianmaplus_supplies), ctx->supplies);
+
+	return 0;
+}
+
+static const struct drm_display_mode nt36672a_tianmaplus_mode = {
+	.clock = (1080 + 90 + 2 + 120) * (2340 + 10 + 3 + 8) * 60 / 1000,
+	.hdisplay = 1080,
+	.hsync_start = 1080 + 90,
+	.hsync_end = 1080 + 90 + 2,
+	.htotal = 1080 + 90 + 2 + 120,
+	.vdisplay = 2340,
+	.vsync_start = 2340 + 10,
+	.vsync_end = 2340 + 10 + 3,
+	.vtotal = 2340 + 10 + 3 + 8,
+	.width_mm = 67,
+	.height_mm = 145,
+	.type = DRM_MODE_TYPE_DRIVER,
+};
+
+static int nt36672a_tianmaplus_get_modes(struct drm_panel *panel,
+					 struct drm_connector *connector)
+{
+	return drm_connector_helper_get_modes_fixed(connector, &nt36672a_tianmaplus_mode);
+}
+
+static const struct drm_panel_funcs nt36672a_tianmaplus_panel_funcs = {
+	.prepare = nt36672a_tianmaplus_prepare,
+	.unprepare = nt36672a_tianmaplus_unprepare,
+	.get_modes = nt36672a_tianmaplus_get_modes,
+};
+
+static int nt36672a_tianmaplus_probe(struct mipi_dsi_device *dsi)
+{
+	struct device *dev = &dsi->dev;
+	struct nt36672a_tianmaplus *ctx;
+	int ret;
+
+	ctx = devm_drm_panel_alloc(dev, struct nt36672a_tianmaplus, panel,
+				   &nt36672a_tianmaplus_panel_funcs,
+				   DRM_MODE_CONNECTOR_DSI);
+	if (IS_ERR(ctx))
+		return PTR_ERR(ctx);
+
+	ret = devm_regulator_bulk_get_const(dev,
+					    ARRAY_SIZE(nt36672a_tianmaplus_supplies),
+					    nt36672a_tianmaplus_supplies,
+					    &ctx->supplies);
+	if (ret < 0)
+		return ret;
+
+	ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+	if (IS_ERR(ctx->reset_gpio))
+		return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
+				     "Failed to get reset-gpios\n");
+
+	ctx->dsi = dsi;
+	mipi_dsi_set_drvdata(dsi, ctx);
+
+	dsi->lanes = 4;
+	dsi->format = MIPI_DSI_FMT_RGB888;
+	dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST |
+			  MIPI_DSI_CLOCK_NON_CONTINUOUS;
+
+	ctx->panel.prepare_prev_first = true;
+
+	ret = drm_panel_of_backlight(&ctx->panel);
+	if (ret)
+		return dev_err_probe(dev, ret, "Failed to get backlight\n");
+
+	drm_panel_add(&ctx->panel);
+
+	ret = mipi_dsi_attach(dsi);
+	if (ret < 0) {
+		drm_panel_remove(&ctx->panel);
+		return dev_err_probe(dev, ret, "Failed to attach to DSI host\n");
+	}
+
+	return 0;
+}
+
+static void nt36672a_tianmaplus_remove(struct mipi_dsi_device *dsi)
+{
+	struct nt36672a_tianmaplus *ctx = mipi_dsi_get_drvdata(dsi);
+	int ret;
+
+	ret = mipi_dsi_detach(dsi);
+	if (ret < 0)
+		dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret);
+
+	drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id nt36672a_tianmaplus_of_match[] = {
+	{ .compatible = "mdss,nt36672a-tianmaplus" }, // FIXME
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, nt36672a_tianmaplus_of_match);
+
+static struct mipi_dsi_driver nt36672a_tianmaplus_driver = {
+	.probe = nt36672a_tianmaplus_probe,
+	.remove = nt36672a_tianmaplus_remove,
+	.driver = {
+		.name = "panel-nt36672a-tianmaplus",
+		.of_match_table = nt36672a_tianmaplus_of_match,
+	},
+};
+module_mipi_dsi_driver(nt36672a_tianmaplus_driver);
+
+MODULE_AUTHOR("linux-mdss-dsi-panel-driver-generator <fix@me>"); // FIXME
+MODULE_DESCRIPTION("DRM driver for tianma nt36672a fhdplus video mode dsi panel");
+MODULE_LICENSE("GPL");
diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c
index ae0b431410cdcc..cd8e4e43954585 100644
--- a/drivers/gpu/drm/panel/panel-simple.c
+++ b/drivers/gpu/drm/panel/panel-simple.c
@@ -579,9 +579,10 @@ static int panel_simple_probe(struct device *dev, const struct panel_desc *desc)
 	u32 bus_flags;
 	int err;
 
-	panel = devm_kzalloc(dev, sizeof(*panel), GFP_KERNEL);
-	if (!panel)
-		return -ENOMEM;
+	panel = devm_drm_panel_alloc(dev, struct panel_simple, base,
+				     &panel_simple_funcs, desc->connector_type);
+	if (IS_ERR(panel))
+		return PTR_ERR(panel);
 
 	panel->desc = desc;
 
@@ -694,8 +695,6 @@ static int panel_simple_probe(struct device *dev, const struct panel_desc *desc)
 	pm_runtime_set_autosuspend_delay(dev, 1000);
 	pm_runtime_use_autosuspend(dev);
 
-	drm_panel_init(&panel->base, dev, &panel_simple_funcs, connector_type);
-
 	err = drm_panel_of_backlight(&panel->base);
 	if (err) {
 		dev_err_probe(dev, err, "Could not find backlight\n");
diff --git a/include/drm/drm_panel.h b/include/drm/drm_panel.h
index a9c042c8dea1a8..31d84f901c514c 100644
--- a/include/drm/drm_panel.h
+++ b/include/drm/drm_panel.h
@@ -28,6 +28,7 @@
 #include <linux/errno.h>
 #include <linux/list.h>
 #include <linux/mutex.h>
+#include <linux/kref.h>
 
 struct backlight_device;
 struct dentry;
@@ -266,12 +267,52 @@ struct drm_panel {
 	 * If true then the panel has been enabled.
 	 */
 	bool enabled;
+
+	/**
+	 * @container: Pointer to the private driver struct embedding this
+	 * @struct drm_panel.
+	 */
+	void *container;
+
+	/**
+	 * @refcount: reference count of users referencing this panel.
+	 */
+	struct kref refcount;
 };
 
+void *__devm_drm_panel_alloc(struct device *dev, size_t size, size_t offset,
+			     const struct drm_panel_funcs *funcs,
+			     int connector_type);
+
+/**
+ * devm_drm_panel_alloc - Allocate and initialize a refcounted panel.
+ *
+ * @dev: struct device of the panel device
+ * @type: the type of the struct which contains struct &drm_panel
+ * @member: the name of the &drm_panel within @type
+ * @funcs: callbacks for this panel
+ * @connector_type: the connector type (DRM_MODE_CONNECTOR_*) corresponding to
+ * the panel interface
+ *
+ * The reference count of the returned panel is initialized to 1. This
+ * reference will be automatically dropped via devm (by calling
+ * drm_panel_put()) when @dev is removed.
+ *
+ * Returns:
+ * Pointer to container structure embedding the panel, ERR_PTR on failure.
+ */
+#define devm_drm_panel_alloc(dev, type, member, funcs, connector_type) \
+	((type *)__devm_drm_panel_alloc(dev, sizeof(type), \
+					offsetof(type, member), funcs, \
+					connector_type))
+
 void drm_panel_init(struct drm_panel *panel, struct device *dev,
 		    const struct drm_panel_funcs *funcs,
 		    int connector_type);
 
+struct drm_panel *drm_panel_get(struct drm_panel *panel);
+void drm_panel_put(struct drm_panel *panel);
+
 void drm_panel_add(struct drm_panel *panel);
 void drm_panel_remove(struct drm_panel *panel);