diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 0ae8c0824e7cf7..ec2f14bf11f05c 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -897,6 +897,8 @@ properties: - xiaomi,tulip - xiaomi,whyred - motorola,beckham + - bbry,luna-syna + - bbry,luna-boe - const: qcom,sdm636 - items: @@ -907,6 +909,8 @@ properties: - xiaomi,lavender-boe - xiaomi,lavender-tianma - xiaomi,platina + - bbry,athena-syna + - bbry,athena-boe - const: qcom,sdm660 - items: diff --git a/Documentation/devicetree/bindings/display/panel/boe,bv045fhm-l00.yaml b/Documentation/devicetree/bindings/display/panel/boe,bv045fhm-l00.yaml new file mode 100644 index 00000000000000..2d3bb8d7283369 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/boe,bv045fhm-l00.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/panel/boe,bv045fhm-l00.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: BOE BV045FHM-L00 LCD DSI Panel + +maintainers: + - Paul Sajna + +allOf: + - $ref: panel-common.yaml# + +properties: + compatible: + enum: + - boe,bv045fhm-l00 + + reg: + maxItems: 1 + + reset-gpios: + description: specifies a GPIO used for the reset pin + + backlight: + description: phandle of the backlight device attached to the panel + + port: true + rotation: true + width-mm: true + height-mm: true + +required: + - compatible + - reg + - reset-gpios + +unevalueatedProperties: false + +examples: + - | + #address-cells = <1>; + #size-cells = <0>; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-supply = <&vreg_l1a_1p225>; + + panel: panel@0 { + compatible = "boe,bv045fhm-l00"; + reg = <0>; + + backlight = <&pm660l_wled>; + reset-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>; + + pinctrl-0 = <&mdss_dsi_active &mdss_te_active>; + pinctrl-1 = <&mdss_dsi_sleep &mdss_te_sleep>; + pinctrl-names = "default", "sleep"; + + width-mm = <63>; + height-mm = <95>; + + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/mfd/st,stmpe.yaml b/Documentation/devicetree/bindings/mfd/st,stmpe.yaml index b77cc3f3075d79..7f7c1d7cc92191 100644 --- a/Documentation/devicetree/bindings/mfd/st,stmpe.yaml +++ b/Documentation/devicetree/bindings/mfd/st,stmpe.yaml @@ -25,6 +25,7 @@ properties: - st,stmpe811 - st,stmpe1600 - st,stmpe1601 + - st,stmpe1801 - st,stmpe2401 - st,stmpe2403 diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 190ab40cf23afc..f9059bf26ee7ba 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -208,6 +208,8 @@ patternProperties: description: BAIKAL ELECTRONICS, JSC "^bananapi,.*": description: BIPAI KEJI LIMITED + "^bbry,.*": + description: BlackBerry Limited "^beacon,.*": description: Compass Electronics Group, LLC "^beagle,.*": diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index fb8605219d6a0f..c67aec4246b81c 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -217,10 +217,14 @@ dtb-$(CONFIG_ARCH_QCOM) += sdm630-sony-xperia-nile-voyager.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm632-fairphone-fp3.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm632-motorola-ocean.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm636-asus-x00td.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm636-bbry-luna-boe.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm636-bbry-luna-syna.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm636-motorola-beckham.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm636-sony-xperia-ganges-mermaid.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm636-xiaomi-tulip.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm636-xiaomi-whyred.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm660-bbry-athena-boe.dtb +dtb-$(CONFIG_ARCH_QCOM) += sdm660-bbry-athena-syna.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-clover-plus.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-jasmine.dtb dtb-$(CONFIG_ARCH_QCOM) += sdm660-xiaomi-lavender-tianma.dtb diff --git a/arch/arm64/boot/dts/qcom/sdm636-bbry-luna-boe.dts b/arch/arm64/boot/dts/qcom/sdm636-bbry-luna-boe.dts new file mode 100755 index 00000000000000..44df0eeca1bccb --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm636-bbry-luna-boe.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2025, Paul Sajna + */ + +/dts-v1/; + +#include "sdm636-bbry-luna-common.dtsi" + +/ { + compatible = "bbry,luna-boe", "qcom,sdm636"; +}; + +&panel { + compatible = "boe,bv045fhm-l00"; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm636-bbry-luna-common.dtsi b/arch/arm64/boot/dts/qcom/sdm636-bbry-luna-common.dtsi new file mode 100755 index 00000000000000..ac7e79b6822d0e --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm636-bbry-luna-common.dtsi @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2025, Paul Sajna + */ + +/dts-v1/; + +#include "sdm636.dtsi" +#include "sdm660-bbry-common.dtsi" + +/ { + model = "BlackBerry KEY2 LE"; + chassis-type = "handset"; +}; + +&adreno_gpu_zap { + firmware-name = "qcom/sdm636/luna/a512_zap.mbn"; +}; + +&adsp_pil { + firmware-name = "qcom/sdm636/luna/adsp.mbn"; +}; + +&remoteproc_mss { + firmware-name = "qcom/sdm636/luna/mba.mbn", "qcom/sdm636/luna/modem.mbn"; +}; + +&venus { + firmware-name = "qcom/sdm636/luna/venus.mbn"; +}; + +&wifi { + qcom,ath10k-calibration-variant = "bbry_luna"; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm636-bbry-luna-syna.dts b/arch/arm64/boot/dts/qcom/sdm636-bbry-luna-syna.dts new file mode 100755 index 00000000000000..2c244a1cbf5f87 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm636-bbry-luna-syna.dts @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2025, Paul Sajna + */ + +/dts-v1/; + +#include "sdm636-bbry-luna-common.dtsi" + +/ { + compatible = "bbry,luna-syna", "qcom,sdm636"; +}; + +&panel { + compatible = "syna,td4300-panel"; + + panel-timing { + clock-frequency = <127280160>; + hactive = <1080>; + hsync-len = <2>; + hfront-porch = <120>; + hback-porch = <40>; + + vactive = <1620>; + vsync-len = <2>; + vfront-porch = <8>; + vback-porch = <6>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm660-bbry-athena-boe.dts b/arch/arm64/boot/dts/qcom/sdm660-bbry-athena-boe.dts new file mode 100755 index 00000000000000..06c3c5d2c0a6ec --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm660-bbry-athena-boe.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2025, Paul Sajna + */ + +/dts-v1/; + +#include "sdm660-bbry-athena-common.dtsi" + +/ { + compatible = "bbry,athena-boe", "qcom,sdm660"; +}; + +&panel { + compatible = "boe,bv045fhm-l00"; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm660-bbry-athena-common.dtsi b/arch/arm64/boot/dts/qcom/sdm660-bbry-athena-common.dtsi new file mode 100755 index 00000000000000..a438333d797822 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm660-bbry-athena-common.dtsi @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2025, Paul Sajna + */ + +/dts-v1/; + +#include "sdm660.dtsi" +#include "sdm660-bbry-common.dtsi" + +/ { + model = "BlackBerry KEY2"; + chassis-type = "handset"; +}; + +&adreno_gpu_zap { + firmware-name = "qcom/sdm660/athena/a512_zap.mbn"; +}; + +&adsp_pil { + firmware-name = "qcom/sdm660/athena/adsp.mbn"; +}; + +&remoteproc_mss { + firmware-name = "qcom/sdm660/athena/mba.mbn", "qcom/sdm660/athena/modem.mbn"; +}; + +&venus { + firmware-name = "qcom/sdm660/athena/venus.mbn"; +}; + +&wifi { + qcom,ath10k-calibration-variant = "bbry_athena"; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm660-bbry-athena-syna.dts b/arch/arm64/boot/dts/qcom/sdm660-bbry-athena-syna.dts new file mode 100755 index 00000000000000..9b8ac09c5bfecd --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm660-bbry-athena-syna.dts @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2025, Paul Sajna + */ + +/dts-v1/; + +#include "sdm660-bbry-athena-common.dtsi" + +/ { + compatible = "bbry,athena-syna", "qcom,sdm660"; +}; + +&panel { + compatible = "syna,td4300-panel"; + + panel-timing { + clock-frequency = <127280160>; + hactive = <1080>; + hsync-len = <2>; + hfront-porch = <120>; + hback-porch = <40>; + + vactive = <1620>; + vsync-len = <2>; + vfront-porch = <8>; + vback-porch = <6>; + }; +}; diff --git a/arch/arm64/boot/dts/qcom/sdm660-bbry-common.dtsi b/arch/arm64/boot/dts/qcom/sdm660-bbry-common.dtsi new file mode 100755 index 00000000000000..999452f3a7a71c --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sdm660-bbry-common.dtsi @@ -0,0 +1,748 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright (c) 2025, Paul Sajna + */ + +#include "pm660.dtsi" +#include "pm660l.dtsi" +#include +#include + +/delete-node/ &qhee_code; +/delete-node/ &tz_mem; +/delete-node/ &buffer_mem; +/delete-node/ &zap_shader_region; +/delete-node/ &rmtfs_mem; + +/ { + aliases { + i2c1 = &blsp_i2c1; + i2c2 = &blsp_i2c2; + i2c4 = &blsp_i2c4; + i2c6 = &blsp_i2c6; + }; + + chosen { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + stdout-path = "framebuffer0"; + + framebuffer0: framebuffer@9d400000 { + compatible = "simple-framebuffer"; + reg = <0x0 0x9d400000 0x0 (1080 * 1620 * 4)>; + status = "okay"; + width = <1080>; + height = <1620>; + stride = <(1080 * 4)>; + format = "a8r8g8b8"; + + /* + * Prevent unused clocks and power domains from being disabled. It's + * needed to keep bootloader-enabled display stack (and therefore + * framebuffer) working. So we can boot with simplefb without + * clk_ignore_unused pd_ignore_unused. + */ + assigned-clocks = <&mmcc MDSS_MDP_CLK>, /* from mdp */ + <&mmcc MDSS_VSYNC_CLK>; + assigned-clock-rates = <300000000>, + <19200000>; + clocks = <&mmcc MDSS_AHB_CLK>, /* from mdss & mdp */ + <&mmcc MDSS_AXI_CLK>, + <&mmcc MDSS_VSYNC_CLK>, + <&mmcc MDSS_MDP_CLK>, + <&mmcc BYTE0_CLK_SRC>, /* from mdss_dsi0 */ + <&mmcc PCLK0_CLK_SRC>, + <&mmcc MDSS_BYTE0_CLK>, + <&mmcc MDSS_BYTE0_INTF_CLK>, + <&mmcc MNOC_AHB_CLK>, + <&mmcc MISC_AHB_CLK>, + <&mmcc MDSS_PCLK0_CLK>, + <&mmcc MDSS_ESC0_CLK>; + + power-domains = <&rpmpd SDM660_VDDCX>, <&mmcc MDSS_GDSC>; + + /* In order to allow simpledrm framebuffer to know + * physical dimensions */ + panel = <&fb_panel>; + + fb_panel: fb-panel { + width-mm = <63>; + height-mm = <95>; + }; + }; + }; + + gpio_keys { + compatible = "gpio-keys"; + + key-vol-up { + label = "Volume Up"; + gpios = <&pm660l_gpios 0x07 0x01>; + linux,code = ; + debounce-interval = <15>; + }; + + conven-key { + label = "conven-key"; + gpios = <&tlmm 0x71 0x01>; + linux,code = ; + debounce-interval = <15>; + }; + }; + + reserved-memory { + #address-cells = <0x02>; + #size-cells = <0x02>; + ranges; + + framebuffer_mem: memory@9d400000 { + reg = <0x0 0x9d400000 0x0 (1080 * 1620 * 4)>; + no-map; + }; + + zap_shader_region: gpu-zap-mem@fe000000 { + compatible = "shared-dma-pool"; + reg = <0x0 0xfe000000 0x0 0x2000>; + no-map; + }; + + venus_fw_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x00 0x80000000 0x00 0x20000000>; + reusable; + alignment = <0x00 0x400000>; + size = <0x00 0x800000>; + }; + + adsp_fw_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x00 0x00 0x00 0xffffffff>; + reusable; + alignment = <0x00 0x400000>; + size = <0x00 0x800000>; + }; + + qseecom_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x00 0x00 0x00 0xffffffff>; + reusable; + alignment = <0x00 0x400000>; + size = <0x00 0x1c00000>; + }; + + secure_region { + compatible = "shared-dma-pool"; + alloc-ranges = <0x00 0x00 0x00 0xffffffff>; + reusable; + alignment = <0x00 0x400000>; + size = <0x00 0x5c00000>; + }; + + linux,cma { + compatible = "shared-dma-pool"; + alloc-ranges = <0x00 0x00 0x00 0xffffffff>; + reusable; + alignment = <0x00 0x400000>; + size = <0x00 0x2c00000>; + linux,cma-default; + }; + + rmtfs_mem: memory@fdc00000 { + compatible = "qcom,rmtfs-mem"; + reg = <0x0 0xfdc00000 0x0 0x400000>; + no-map; + + qcom,client-id = <1>; + qcom,vmid = ; + }; + }; + + vph_pwr: vph-pwr-regulator { + compatible = "regulator-fixed"; + regulator-name = "vph_pwr"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + regulator-always-on; + regulator-boot-on; + }; + + battery: battery { + compatible = "simple-battery"; + charge-full-design-microamp-hours = <3000000>; + voltage-min-design-microvolt = <3400000>; + voltage-max-design-microvolt = <4350000>; + }; + + keypad_vdd_vreg: keypad-vdd-regulator { + compatible = "regulator-fixed"; + regulator-name = "keypad_vdd_vreg"; + gpio = <&tlmm 42 GPIO_ACTIVE_HIGH>; + enable-active-high; + vin-supply = <&vreg_s4a_2p04>; + + pinctrl-0 = <&keypad_pwr_en>; + pinctrl-names = "default"; + }; +}; + + +&pon_pwrkey { + status = "okay"; +}; + +&pon_resin { + linux,code = ; + + status = "okay"; +}; + +&adreno_gpu { + status = "okay"; +}; + +&adreno_gpu_zap { + memory-region = <&zap_shader_region>; + + status = "okay"; +}; + +&adsp_pil { + status = "okay"; +}; + +&blsp2_uart1 { + status = "okay"; + + /* HCI Bluetooth */ + bluetooth { + compatible = "qcom,wcn3990-bt"; + vddxo-supply = <&vreg_l9a_1p8>; + vddrf-supply = <&vreg_l6a_1p3>; + vddch0-supply = <&vreg_l3b_3p3>; + vddio-supply = <&vreg_l9a_1p8>; + max-speed = <3200000>; + firmware-name = "crnv21.bin"; + }; +}; + +&blsp1_uart2 { + status = "okay"; +}; + + +&blsp_i2c1 { + status = "okay"; + + stmpe1801: port-expander@40 + { + compatible = "st,stmpe1801"; + reg = <0x40>; + vcc-supply = <&keypad_vdd_vreg>; + vio-supply = <&keypad_vdd_vreg>; + pinctrl-names = "default"; + pinctrl-0 = <&keypad_int_active &keypad_reset_active>; + wakeup-source; + + interrupt-parent = <&tlmm>; + interrupts = <13 IRQ_TYPE_EDGE_FALLING>; + + keyboard-controller { + compatible="st,stmpe-keypad"; + st,scan-count = <2>; + debounce-interval = <10>; + keypad,num-rows = <8>; + keypad,num-columns = <8>; + + linux,keymap = < + /* Row 1 */ + MATRIX_KEY(3, 1, KEY_Q) + MATRIX_KEY(3, 7, KEY_W) + MATRIX_KEY(4, 1, KEY_E) + MATRIX_KEY(5, 1, KEY_R) + MATRIX_KEY(5, 4, KEY_T) + MATRIX_KEY(6, 4, KEY_Y) + MATRIX_KEY(6, 1, KEY_U) + MATRIX_KEY(7, 4, KEY_I) + MATRIX_KEY(7, 1, KEY_O) + MATRIX_KEY(4, 2, KEY_P) + /* Row 2 */ + MATRIX_KEY(3, 4, KEY_A) + MATRIX_KEY(4, 7, KEY_S) + MATRIX_KEY(4, 4, KEY_D) + MATRIX_KEY(5, 5, KEY_F) + MATRIX_KEY(5, 7, KEY_G) + MATRIX_KEY(6, 7, KEY_H) + MATRIX_KEY(6, 5, KEY_J) + MATRIX_KEY(7, 5, KEY_K) + MATRIX_KEY(7, 7, KEY_L) + MATRIX_KEY(7, 2, KEY_BACKSPACE) + /* Row 3 */ + MATRIX_KEY(3, 6, KEY_LEFTALT) + MATRIX_KEY(4, 0, KEY_Z) + MATRIX_KEY(4, 6, KEY_X) + MATRIX_KEY(5, 0, KEY_C) + MATRIX_KEY(5, 6, KEY_V) + MATRIX_KEY(6, 6, KEY_B) + MATRIX_KEY(6, 0, KEY_N) + MATRIX_KEY(7, 0, KEY_M) + MATRIX_KEY(7, 6, KEY_DOLLAR) + MATRIX_KEY(6, 2, KEY_ENTER) + /* Row 4 */ + MATRIX_KEY(4, 5, KEY_LEFTSHIFT) + MATRIX_KEY(3, 5, KEY_DICTATE) + MATRIX_KEY(3, 0, KEY_SPACE) + MATRIX_KEY(3, 2, KEY_RIGHTALT) + MATRIX_KEY(5, 2, KEY_RIGHTMETA) + >; + }; + }; +}; + +&blsp_i2c4 { + #address-cells = <1>; + #size-cells = <0>; + + status = "okay"; + + /* Focaltech ft8707 */ + touchscreen@38 { + compatible = "focaltech,ft8719"; + reg = <0x38>; + pinctrl-0 = <&ts_int_active &ts_reset_active>; + pinctrl-1 = <&ts_int_sleep &ts_reset_sleep>; + pinctrl-names = "default", "sleep"; + interrupt-parent = <&tlmm>; + interrupts = <67 IRQ_TYPE_EDGE_FALLING>; + vcc-supply = <&vreg_l3b_3p3>; + iovcc-supply = <&vreg_l9a_1p8>; + reset-gpios = <&tlmm 66 GPIO_ACTIVE_LOW>; + touchscreen-size-x = <1080>; + touchscreen-size-y = <1620>; + wakeup-source; + }; +}; + +&mdss { + status = "okay"; +}; + +&mdss_dsi0 { + #address-cells = <1>; + #size-cells = <0>; + + vdd-supply = <&vreg_l1b_0p925>; + vdda-supply = <&vreg_l1a_1p225>; + + status = "okay"; + + + panel: panel@0 { + reg = <0>; + + reset-gpios = <&tlmm 53 GPIO_ACTIVE_LOW>; + backlight = <&pm660l_wled>; + width-mm = <63>; + height-mm = <95>; + + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&mdss_dsi_active &mdss_te_active>; + pinctrl-1 = <&mdss_dsi_sleep &mdss_te_sleep>; + + port { + panel_in: endpoint { + remote-endpoint = <&mdss_dsi0_out>; + }; + }; + }; +}; + +&mdss_dsi0_out { + data-lanes = <0 1 2 3>; + remote-endpoint = <&panel_in>; +}; + +&mdss_dsi0_phy { + vcca-supply = <&vreg_l1b_0p925>; + + status = "okay"; +}; + +&mmss_smmu { + status = "okay"; +}; + +&pm660_charger { + monitored-battery = <&battery>; + + status = "okay"; +}; + +&pm660_fg { + monitored-battery = <&battery>; + power-supplies = <&pm660_charger>; + + status = "okay"; +}; + +&pm660_haptics { + status = "okay"; +}; + +&pm660_rradc { + status = "okay"; +}; + +&pm660l_wled { + default-brightness = <512>; + + status = "okay"; +}; + +&pon_pwrkey { + status = "okay"; +}; + +&qusb2phy0 { + vdd-supply = <&vreg_l1b_0p925>; + vdda-pll-supply = <&vreg_l9a_1p8>; + vdda-phy-dpdm-supply = <&vreg_l7b_3p125>; + + status = "okay"; +}; + +&remoteproc_mss { + status = "okay"; +}; + +&rpm_requests { + regulators-0 { + compatible = "qcom,rpm-pm660-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3-supply = <&vph_pwr>; + vdd_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l6_l7-supply = <&vreg_s5a_1p35>; + vdd_l2_l3-supply = <&vreg_s2b_1p05>; + vdd_l5-supply = <&vreg_s2b_1p05>; + vdd_l8_l9_l10_l11_l12_l13_l14-supply = <&vreg_s4a_2p04>; + vdd_l15_l16_l17_l18_l19-supply = <&vreg_bob>; + + /* + * S1A (FTAPC0), S2A (FTAPC1), S3A (HFAPC1) are managed + * by the Core Power Reduction hardened (CPRh) and the + * Operating State Manager (OSM) HW automatically. + */ + + vreg_s4a_2p04: s4 { + regulator-min-microvolt = <1805000>; + regulator-max-microvolt = <2040000>; + regulator-enable-ramp-delay = <200>; + regulator-always-on; + }; + + vreg_s5a_1p35: s5 { + regulator-min-microvolt = <1224000>; + regulator-max-microvolt = <1350000>; + regulator-enable-ramp-delay = <200>; + }; + + vreg_s6a_0p87: s6 { + regulator-min-microvolt = <504000>; + regulator-max-microvolt = <992000>; + regulator-enable-ramp-delay = <150>; + }; + + /* LDOs */ + vreg_l1a_1p225: l1 { + regulator-min-microvolt = <1150000>; + regulator-max-microvolt = <1250000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l2a_1p0: l2 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1010000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l3a_1p0: l3 { + regulator-min-microvolt = <950000>; + regulator-max-microvolt = <1010000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l5a_0p848: l5 { + regulator-min-microvolt = <525000>; + regulator-max-microvolt = <950000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l6a_1p3: l6 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1370000>; + regulator-allow-set-load; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l7a_1p2: l7 { + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l8a_1p8: l8 { + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + regulator-system-load = <325000>; + regulator-allow-set-load; + }; + + vreg_l9a_1p8: l9 { + regulator-min-microvolt = <1750000>; + regulator-max-microvolt = <1900000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + }; + + regulators-1 { + compatible = "qcom,rpm-pm660l-regulators"; + + vdd_s1-supply = <&vph_pwr>; + vdd_s2-supply = <&vph_pwr>; + vdd_s3_s4-supply = <&vph_pwr>; + vdd_s5-supply = <&vph_pwr>; + vdd_s6-supply = <&vph_pwr>; + + vdd_l1_l9_l10-supply = <&vreg_s2b_1p05>; + vdd_l2-supply = <&vreg_bob>; + vdd_l3_l5_l7_l8-supply = <&vreg_bob>; + vdd_l4_l6-supply = <&vreg_bob>; + vdd_bob-supply = <&vph_pwr>; + + vreg_bob: bob { + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3600000>; + regulator-enable-ramp-delay = <500>; + }; + + vreg_s1b_1p125: s1 { + regulator-min-microvolt = <1125000>; + regulator-max-microvolt = <1125000>; + regulator-enable-ramp-delay = <200>; + }; + + vreg_s2b_1p05: s2 { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + regulator-enable-ramp-delay = <200>; + }; + + /* LDOs */ + vreg_l1b_0p925: l1 { + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <925000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + /* SDHCI 3.3V signal doesn't seem to be supported. */ + vreg_l2b_2p95: l2 { + regulator-min-microvolt = <1648000>; + regulator-max-microvolt = <3100000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l3b_3p3: l3 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3600000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l4b_2p95: l4 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <2950000>; + regulator-enable-ramp-delay = <250>; + + regulator-min-microamp = <200>; + regulator-max-microamp = <600000>; + regulator-system-load = <570000>; + regulator-allow-set-load; + }; + + /* + * Downstream specifies a range of 1721-3600mV, + * but the only assigned consumers are SDHCI2 VMMC + * and Coresight QPDI that both request pinned 2.95V. + * Tighten the range to 1.8-3.328 (closest to 3.3) to + * make the mmc driver happy. + */ + vreg_l5b_2p95: l5 { + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3328000>; + regulator-enable-ramp-delay = <250>; + regulator-allow-set-load; + }; + + vreg_l6b_3p3: l6 { + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <3300000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l7b_3p125: l7 { + regulator-min-microvolt = <2700000>; + regulator-max-microvolt = <3125000>; + regulator-enable-ramp-delay = <250>; + }; + + vreg_l8b_3p3: l8 { + regulator-min-microvolt = <3200000>; + regulator-max-microvolt = <3400000>; + regulator-enable-ramp-delay = <250>; + }; + }; +}; + +&sdhc_1 { + bus-width = <8>; + non-removable; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + mmc-hs400-1_8v; + vmmc-supply = <&vreg_l4b_2p95>; + vqmmc-supply = <&vreg_l8a_1p8>; + + status = "okay"; +}; + +&sdhc_2 { + cd-gpios = <&tlmm 54 GPIO_ACTIVE_HIGH>; + + vmmc-supply = <&vreg_l5b_2p95>; + vqmmc-supply = <&vreg_l2b_2p95>; + + status = "okay"; +}; + +&tlmm { + gpio-reserved-ranges = <8 4>; + + mdss_dsi_active: mdss-dsi-active-state { + pins = "gpio53"; + function = "gpio"; + bias-disable; + drive-strength = <0x08>; + }; + + mdss_dsi_sleep: mdss-dsi-sleep-state { + pins = "gpio53"; + function = "gpio"; + drive-strength = <0x02>; + bias-pull-down; + }; + + mdss_te_active: mdss-te-active-state { + pins = "gpio59"; + function = "mdp_vsync"; + drive-strength = <0x02>; + bias-pull-down; + }; + + mdss_te_sleep: mdss-te-sleep-state { + pins = "gpio59"; + function = "mdp_vsync"; + drive-strength = <0x02>; + bias-pull-down; + }; + + ts_int_active: ts-int-active-state { + pins = "gpio67"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + ts_int_sleep: ts-int-sleep-state { + pins = "gpio67"; + function = "gpio"; + drive-strength = <8>; + bias-disable; + }; + + ts_reset_active: ts-reset-active-state { + pins = "gpio66"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + ts_reset_sleep: ts-reset-sleep-state { + pins = "gpio66"; + function = "gpio"; + drive-strength = <8>; + bias-pull-down; + }; + + keypad_int_active: keypad-int-active-state { + pins = "gpio13"; + function = "gpio"; + drive-strength = <2>; + bias-pull-up; + }; + + keypad_reset_active: keypad-reset-active-state { + pins = "gpio61"; + function = "gpio"; + drive-strength = <8>; + bias-pull-up; + }; + + keypad_pwr_en: keypad-pwr-en-state { + pins = "gpio42"; + function = "gpio"; + drive-strength = <2>; + bias-disable; + output-low; + }; +}; + +&usb3 { + qcom,select-utmi-as-pipe-clk; + + status = "okay"; +}; + +&usb3_dwc3 { + dr_mode = "peripheral"; + + maximum-speed = "high-speed"; + phys = <&qusb2phy0>; + phy-names = "usb2-phy"; + + status = "okay"; +}; + +&venus { + status = "okay"; +}; + +&wifi { + vdd-0.8-cx-mx-supply = <&vreg_l5a_0p848>; + vdd-1.8-xo-supply = <&vreg_l9a_1p8>; + vdd-1.3-rfa-supply = <&vreg_l6a_1p3>; + vdd-3.3-ch0-supply = <&vreg_l3b_3p3>; + vdd-3.3-ch1-supply = <&vreg_l3b_3p3>; + + status = "okay"; +}; diff --git a/arch/arm64/configs/sdm660_defconfig b/arch/arm64/configs/sdm660_defconfig index 016b5e54a51619..24e8218d3bc16d 100644 --- a/arch/arm64/configs/sdm660_defconfig +++ b/arch/arm64/configs/sdm660_defconfig @@ -358,6 +358,7 @@ CONFIG_INPUT_EVDEV=y # CONFIG_KEYBOARD_ATKBD is not set CONFIG_KEYBOARD_GPIO=y CONFIG_KEYBOARD_GPIO_POLLED=y +CONFIG_KEYBOARD_STMPE=m # CONFIG_MOUSE_PS2 is not set CONFIG_MOUSE_SYNAPTICS_I2C=m CONFIG_MOUSE_SYNAPTICS_USB=m @@ -430,6 +431,9 @@ CONFIG_WATCHDOG_CORE=y CONFIG_QCOM_WDT=m CONFIG_MFD_QCOM_RPM=y CONFIG_MFD_SPMI_PMIC=y +CONFIG_MFD_CORE=y +CONFIG_MFD_STMPE=y +CONFIG_STMPE_I2C=y CONFIG_REGULATOR_FIXED_VOLTAGE=y CONFIG_REGULATOR_NETLINK_EVENTS=y CONFIG_REGULATOR_PWM=y @@ -453,6 +457,7 @@ CONFIG_DRM_FBDEV_OVERALLOC=200 CONFIG_DRM_MSM=m # CONFIG_DRM_MSM_MDP4 is not set # CONFIG_DRM_MSM_HDMI is not set +CONFIG_DRM_PANEL_BOE_BV045FHM_L00=m CONFIG_DRM_PANEL_BOE_TD4320=m CONFIG_DRM_PANEL_BOE_NT51021=m CONFIG_DRM_PANEL_FT8716U=m @@ -462,6 +467,7 @@ CONFIG_DRM_PANEL_NOVATEK_NT36672_TIANMA_JASMINE=m CONFIG_DRM_PANEL_NOVATEK_NT36672_TXD=m CONFIG_DRM_PANEL_SAMSUNG_AMS601NT12=m CONFIG_DRM_PANEL_SIMPLE=y +CONFIG_DRM_PANEL_SYNAPTICS_TDDI=m CONFIG_DRM_PANEL_TIANMA_TD4310=m CONFIG_DRM_PANEL_TRULY_TD4322=m CONFIG_DRM_SIMPLEDRM=y diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig index adb7e572519698..e6256998eb7a89 100644 --- a/drivers/gpu/drm/panel/Kconfig +++ b/drivers/gpu/drm/panel/Kconfig @@ -56,6 +56,17 @@ config DRM_PANEL_BOE_BF060Y8M_AJ0 uses 24 bit RGB per pixel. It provides a MIPI DSI interface to the host and backlight is controlled through DSI commands. +config DRM_PANEL_BOE_BV045FHM_L00 + tristate "BOE BV045FHM-L00 panel" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y here if you want to enable support for BV045FHM-L00 + 4.5" LCD panel as found in the BlackBerry KEY2 LE smartphone. + The panel has a 1080x1620 resolution and uses 24 bit RGB per pixel. + It provides a MIPI DSI interface to the host. + config DRM_PANEL_BOE_HIMAX8279D tristate "Boe Himax8279d panel" depends on OF @@ -1008,6 +1019,17 @@ config DRM_PANEL_SYNAPTICS_R63353 Say Y if you want to enable support for panels based on the Synaptics R63353 controller. +config DRM_PANEL_SYNAPTICS_TDDI + tristate "Synaptics TDDI display panels" + depends on OF + depends on DRM_MIPI_DSI + depends on BACKLIGHT_CLASS_DEVICE + help + Say Y if you want to enable support for the Synaptics TDDI display + panels. There are multiple MIPI DSI panels manufactured under the TDDI + namesake, with varying resolutions and data lanes. They also have a + built-in LED backlight and a touch controller. + config DRM_PANEL_TDO_TL070WSH30 tristate "TDO TL070WSH30 DSI panel" depends on OF diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile index f9751399ae9099..6712334aef710b 100644 --- a/drivers/gpu/drm/panel/Makefile +++ b/drivers/gpu/drm/panel/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_DRM_PANEL_ARM_VERSATILE) += panel-arm-versatile.o obj-$(CONFIG_DRM_PANEL_ASUS_Z00T_TM5P5_NT35596) += panel-asus-z00t-tm5p5-n35596.o obj-$(CONFIG_DRM_PANEL_AUO_A030JTN01) += panel-auo-a030jtn01.o obj-$(CONFIG_DRM_PANEL_BOE_BF060Y8M_AJ0) += panel-boe-bf060y8m-aj0.o +obj-$(CONFIG_DRM_PANEL_BOE_BV045FHM_L00) += panel-boe-bv045fhm-l00.o obj-$(CONFIG_DRM_PANEL_BOE_HIMAX8279D) += panel-boe-himax8279d.o obj-$(CONFIG_DRM_PANEL_BOE_TD4320) += panel-boe-td4320.o obj-$(CONFIG_DRM_PANEL_BOE_NT51021) += panel-boe-nt51021.o @@ -98,6 +99,7 @@ obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7703) += panel-sitronix-st7703.o obj-$(CONFIG_DRM_PANEL_SITRONIX_ST7789V) += panel-sitronix-st7789v.o obj-$(CONFIG_DRM_PANEL_SUMMIT) += panel-summit.o obj-$(CONFIG_DRM_PANEL_SYNAPTICS_R63353) += panel-synaptics-r63353.o +obj-$(CONFIG_DRM_PANEL_SYNAPTICS_TDDI) += panel-synaptics-tddi.o obj-$(CONFIG_DRM_PANEL_SONY_ACX565AKM) += panel-sony-acx565akm.o obj-$(CONFIG_DRM_PANEL_SONY_TD4353_JDI) += panel-sony-td4353-jdi.o obj-$(CONFIG_DRM_PANEL_SONY_TULIP_TRULY_NT35521) += panel-sony-tulip-truly-nt35521.o diff --git a/drivers/gpu/drm/panel/panel-boe-bv045fhm-l00.c b/drivers/gpu/drm/panel/panel-boe-bv045fhm-l00.c new file mode 100644 index 00000000000000..2a9cc9901fa97c --- /dev/null +++ b/drivers/gpu/drm/panel/panel-boe-bv045fhm-l00.c @@ -0,0 +1,255 @@ +// SPDX-License-Identifier: GPL-2.0-only +// Copyright (c) 2025 Paul Sajna +// Generated with linux-mdss-dsi-panel-driver-generator from vendor device tree: +// Copyright (c) 2013, The Linux Foundation. All rights reserved. + +#include +#include +#include +#include + +#include +#include +#include +#include + +struct boe_bv045fhm_l00 { + struct drm_panel panel; + struct mipi_dsi_device *dsi; + struct gpio_desc *reset_gpio; +}; + +static inline struct boe_bv045fhm_l00 *to_boe_bv045fhm_l00(struct drm_panel *panel) +{ + return container_of(panel, struct boe_bv045fhm_l00, panel); +} + +static void boe_bv045fhm_l00_reset(struct boe_bv045fhm_l00 *ctx) +{ + gpiod_set_value_cansleep(ctx->reset_gpio, 0); + msleep(20); + gpiod_set_value_cansleep(ctx->reset_gpio, 1); + usleep_range(2000, 3000); + gpiod_set_value_cansleep(ctx->reset_gpio, 0); + msleep(20); +} + +static int boe_bv045fhm_l00_on(struct boe_bv045fhm_l00 *ctx) +{ + struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; + + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x00); + mipi_dsi_usleep_range(&dsi_ctx, 1000, 2000); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x87, 0x07, 0x01); + mipi_dsi_usleep_range(&dsi_ctx, 1000, 2000); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x80); + mipi_dsi_usleep_range(&dsi_ctx, 1000, 2000); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x87, 0x07); + mipi_dsi_usleep_range(&dsi_ctx, 1000, 2000); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0xa3); + mipi_dsi_usleep_range(&dsi_ctx, 1000, 2000); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xb3, + 0x06, 0x54, 0x00, 0x10); + mipi_dsi_usleep_range(&dsi_ctx, 1000, 2000); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0xb4); + mipi_dsi_usleep_range(&dsi_ctx, 1000, 2000); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xc0, 0x00); + mipi_dsi_usleep_range(&dsi_ctx, 1000, 2000); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0xa0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, + 0x0c, 0x0a, 0x08, 0x09, 0x0f, 0x0f, + 0x14, 0x15, 0x10, 0x1b, 0x16, 0x12); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0xb0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, + 0xc5, 0x80, 0x88, 0x78, 0x7d, 0x7a, + 0x7b, 0x76, 0x94, 0x97, 0xb2, 0xdd); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0xc0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, + 0x84, 0x80, 0x8a, 0x7d, 0x81, 0x80, + 0x9c, 0x8f, 0x93, 0xa0, 0x9a, 0x99); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0xd0); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xd6, + 0x9a, 0x8a, 0x8d, 0x9a, 0x80, 0x80, + 0x98, 0x9b, 0xaa, 0xaa, 0xa6, 0x94); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x91, 0x80); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe1, + 0x00, 0x05, 0x12, 0x22, 0x2b, 0x3b, + 0x4a, 0x58, 0x58, 0x65, 0x65, 0x77, + 0x90, 0x7d, 0x7f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x10); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe1, + 0x74, 0x6d, 0x60, 0x4e, 0x3f, 0x33, + 0x25, 0x09, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe2, + 0x00, 0x05, 0x12, 0x22, 0x2b, 0x3b, + 0x4a, 0x58, 0x58, 0x65, 0x65, 0x77, + 0x90, 0x7d, 0x7f); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x10); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xe2, + 0x74, 0x6d, 0x60, 0x4e, 0x3f, 0x33, + 0x25, 0x09, 0x00); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x00); + mipi_dsi_usleep_range(&dsi_ctx, 1000, 2000); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x00, 0x00, 0x00); + mipi_dsi_usleep_range(&dsi_ctx, 1000, 2000); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x00, 0x80); + mipi_dsi_usleep_range(&dsi_ctx, 1000, 2000); + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0xff, 0x00, 0x00); + mipi_dsi_usleep_range(&dsi_ctx, 1000, 2000); + mipi_dsi_dcs_exit_sleep_mode_multi(&dsi_ctx); + mipi_dsi_msleep(&dsi_ctx, 120); + mipi_dsi_dcs_set_display_on_multi(&dsi_ctx); + mipi_dsi_msleep(&dsi_ctx, 34); + + return dsi_ctx.accum_err; +} + +static int boe_bv045fhm_l00_off(struct boe_bv045fhm_l00 *ctx) +{ + struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; + + mipi_dsi_dcs_set_display_off_multi(&dsi_ctx); + mipi_dsi_msleep(&dsi_ctx, 34); + mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx); + mipi_dsi_msleep(&dsi_ctx, 120); + + return dsi_ctx.accum_err; +} + +static int boe_bv045fhm_l00_prepare(struct drm_panel *panel) +{ + struct boe_bv045fhm_l00 *ctx = to_boe_bv045fhm_l00(panel); + struct device *dev = &ctx->dsi->dev; + int ret; + + boe_bv045fhm_l00_reset(ctx); + + ret = boe_bv045fhm_l00_on(ctx); + if (ret < 0) { + dev_err(dev, "Failed to initialize panel: %d\n", ret); + gpiod_set_value_cansleep(ctx->reset_gpio, 1); + return ret; + } + + return 0; +} + +static int boe_bv045fhm_l00_unprepare(struct drm_panel *panel) +{ + struct boe_bv045fhm_l00 *ctx = to_boe_bv045fhm_l00(panel); + struct device *dev = &ctx->dsi->dev; + int ret; + + ret = boe_bv045fhm_l00_off(ctx); + if (ret < 0) + dev_err(dev, "Failed to un-initialize panel: %d\n", ret); + + gpiod_set_value_cansleep(ctx->reset_gpio, 1); + + return 0; +} + +static const struct drm_display_mode boe_bv045fhm_l00_mode = { + .clock = (1080 + 10 + 4 + 10) * (1620 + 400 + 1 + 14) * 60 / 1000, + .hdisplay = 1080, + .hsync_start = 1080 + 10, + .hsync_end = 1080 + 10 + 4, + .htotal = 1080 + 10 + 4 + 10, + .vdisplay = 1620, + .vsync_start = 1620 + 400, + .vsync_end = 1620 + 400 + 1, + .vtotal = 1620 + 400 + 1 + 14, + .width_mm = 63, + .height_mm = 95, + .type = DRM_MODE_TYPE_DRIVER, +}; + +static int boe_bv045fhm_l00_get_modes(struct drm_panel *panel, + struct drm_connector *connector) +{ + return drm_connector_helper_get_modes_fixed(connector, &boe_bv045fhm_l00_mode); +} + +static const struct drm_panel_funcs boe_bv045fhm_l00_panel_funcs = { + .prepare = boe_bv045fhm_l00_prepare, + .unprepare = boe_bv045fhm_l00_unprepare, + .get_modes = boe_bv045fhm_l00_get_modes, +}; + +static int boe_bv045fhm_l00_probe(struct mipi_dsi_device *dsi) +{ + struct device *dev = &dsi->dev; + struct boe_bv045fhm_l00 *ctx; + int ret; + + ctx = devm_drm_panel_alloc(dev, struct boe_bv045fhm_l00, panel, + &boe_bv045fhm_l00_panel_funcs, + DRM_MODE_CONNECTOR_DSI); + if (IS_ERR(ctx)) + return PTR_ERR(ctx); + + ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); + if (IS_ERR(ctx->reset_gpio)) + return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio), + "Failed to get reset-gpios\n"); + + ctx->dsi = dsi; + mipi_dsi_set_drvdata(dsi, ctx); + + dsi->lanes = 4; + dsi->format = MIPI_DSI_FMT_RGB888; + dsi->mode_flags = MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | + MIPI_DSI_MODE_VIDEO_HSE | MIPI_DSI_MODE_NO_EOT_PACKET | + MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM; + + ctx->panel.prepare_prev_first = true; + + ret = drm_panel_of_backlight(&ctx->panel); + if (ret) + return dev_err_probe(dev, ret, "Failed to get backlight\n"); + + drm_panel_add(&ctx->panel); + + ret = mipi_dsi_attach(dsi); + if (ret < 0) { + drm_panel_remove(&ctx->panel); + return dev_err_probe(dev, ret, "Failed to attach to DSI host\n"); + } + + return 0; +} + +static void boe_bv045fhm_l00_remove(struct mipi_dsi_device *dsi) +{ + struct boe_bv045fhm_l00 *ctx = mipi_dsi_get_drvdata(dsi); + int ret; + + ret = mipi_dsi_detach(dsi); + if (ret < 0) + dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret); + + drm_panel_remove(&ctx->panel); +} + +static const struct of_device_id boe_bv045fhm_l00_of_match[] = { + { .compatible = "boe,bv045fhm-l00" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, boe_bv045fhm_l00_of_match); + +static struct mipi_dsi_driver boe_bv045fhm_l00_driver = { + .probe = boe_bv045fhm_l00_probe, + .remove = boe_bv045fhm_l00_remove, + .driver = { + .name = "panel-boe-bv045fhm-l00", + .of_match_table = boe_bv045fhm_l00_of_match, + }, +}; +module_mipi_dsi_driver(boe_bv045fhm_l00_driver); + +MODULE_AUTHOR("Paul Sajna "); +MODULE_DESCRIPTION("DRM driver for BOE BV045FHM-L00-1S00 dsi panel"); +MODULE_LICENSE("GPL"); diff --git a/drivers/gpu/drm/panel/panel-synaptics-tddi.c b/drivers/gpu/drm/panel/panel-synaptics-tddi.c new file mode 100644 index 00000000000000..1e99be87917704 --- /dev/null +++ b/drivers/gpu/drm/panel/panel-synaptics-tddi.c @@ -0,0 +1,289 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Synaptics TDDI display panel driver. + * + * Copyright (C) 2025 Kaustabh Chakraborty + */ + +#include +#include +#include +#include + +#include