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lines changed Original file line number Diff line number Diff line change 114
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#define DAC_RESOLUTION 12
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#define DAC_CHANNEL_ID 0
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+ #elif defined(CONFIG_SOC_FAMILY_SILABS_S2 )
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+
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+ #define DAC_DEVICE_NODE DT_NODELABEL(vdac0)
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+ #define DAC_RESOLUTION 12
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+ #define DAC_CHANNEL_ID 0
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+
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#else
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#error "Unsupported board."
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#endif
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+ /*
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+ * Copyright (c) 2025 Silicon Laboratories Inc.
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+ *
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+ * SPDX-License-Identifier: Apache-2.0
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+ */
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+
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+ #include <zephyr/dt-bindings/adc/silabs-adc.h>
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+ #include <zephyr/dt-bindings/dac/silabs-vdac.h>
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+
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+ &adc0 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "okay";
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+
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+ channel@0 {
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+ reg = <0>;
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+ zephyr,gain = "ADC_GAIN_1";
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+ zephyr,reference = "ADC_REF_VDD_1";
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+ zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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+ zephyr,resolution = <12>;
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+ zephyr,input-positive = <IADC_INPUT_DAC0>;
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+ };
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+ };
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+
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+ &vdac0 {
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+ status = "okay";
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+ voltage-reference = "AVDD";
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+
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+ channel@0 {
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+ reg = <0>;
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+ aux-output = <VDAC_OUTPUT_AUX>;
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+ };
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+ };
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+ /*
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+ * Copyright (c) 2025 Silicon Laboratories Inc.
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+ *
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+ * SPDX-License-Identifier: Apache-2.0
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+ */
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+
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+ #include <zephyr/dt-bindings/adc/silabs-adc.h>
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+ #include <zephyr/dt-bindings/dac/silabs-vdac.h>
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+
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+ &adc0 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "okay";
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+
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+ channel@0 {
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+ reg = <0>;
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+ zephyr,gain = "ADC_GAIN_1";
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+ zephyr,reference = "ADC_REF_VDD_1";
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+ zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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+ zephyr,resolution = <12>;
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+ zephyr,input-positive = <IADC_INPUT_DAC0>;
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+ };
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+ };
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+
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+ &vdac0 {
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+ status = "okay";
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+ voltage-reference = "AVDD";
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+
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+ channel@0 {
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+ reg = <0>;
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+ aux-output = <VDAC_OUTPUT_AUX>;
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+ };
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+ };
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+ /*
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+ * Copyright (c) 2025 Silicon Laboratories Inc.
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+ *
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+ * SPDX-License-Identifier: Apache-2.0
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+ */
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+
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+ #include <zephyr/dt-bindings/adc/silabs-adc.h>
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+ #include <zephyr/dt-bindings/dac/silabs-vdac.h>
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+
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+ &adc0 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "okay";
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+
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+ channel@0 {
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+ reg = <0>;
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+ zephyr,gain = "ADC_GAIN_1";
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+ zephyr,reference = "ADC_REF_VDD_1";
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+ zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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+ zephyr,resolution = <12>;
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+ zephyr,input-positive = <IADC_INPUT_DAC0>;
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+ };
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+ };
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+
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+ &vdac0 {
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+ status = "okay";
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+ voltage-reference = "AVDD";
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+
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+ channel@0 {
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+ reg = <0>;
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+ aux-output = <VDAC_OUTPUT_AUX>;
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+ };
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+ };
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+ /*
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+ * Copyright (c) 2025 Silicon Laboratories Inc.
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+ *
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+ * SPDX-License-Identifier: Apache-2.0
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+ */
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+
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+ #include <zephyr/dt-bindings/adc/silabs-adc.h>
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+ #include <zephyr/dt-bindings/dac/silabs-vdac.h>
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+
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+ &adc0 {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+ status = "okay";
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+
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+ channel@0 {
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+ reg = <0>;
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+ zephyr,gain = "ADC_GAIN_1";
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+ zephyr,reference = "ADC_REF_VDD_1";
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+ zephyr,acquisition-time = <ADC_ACQ_TIME_DEFAULT>;
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+ zephyr,resolution = <12>;
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+ zephyr,input-positive = <IADC_INPUT_DAC0>;
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+ };
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+ };
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+
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+ &vdac0 {
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+ status = "okay";
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+ voltage-reference = "AVDD";
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+
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+ channel@0 {
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+ reg = <0>;
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+ aux-output = <VDAC_OUTPUT_AUX>;
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+ };
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+ };
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#define ADC_CHANNEL_ID 0
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#endif
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+ #elif defined(CONFIG_SOC_FAMILY_SILABS_S2 )
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+
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+ /* VDAC0CH0 output is internally available on IADC_INPUT_DAC0 */
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+
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+ #include <zephyr/dt-bindings/adc/silabs-adc.h>
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+
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+ #define DAC_DEVICE_NODE DT_NODELABEL(vdac0)
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+ #define DAC_RESOLUTION 12
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+ #define DAC_CHANNEL_ID 0
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+
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+ #define ADC_DEVICE_NODE DT_NODELABEL(adc0)
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+ #define ADC_RESOLUTION 12
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+ #define ADC_GAIN ADC_GAIN_1
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+ #define ADC_REFERENCE ADC_REF_VDD_1
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+ #define ADC_ACQUISITION_TIME ADC_ACQ_TIME_DEFAULT
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+ #define ADC_CHANNEL_ID 0
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+ #define ADC_1ST_CHANNEL_INPUT IADC_INPUT_DAC0
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+
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#else
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#error "Unsupported board."
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#endif
@@ -208,7 +226,8 @@ static const struct adc_channel_cfg adc_ch_cfg = {
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defined (CONFIG_BOARD_BL653_DVK ) || \
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defined (CONFIG_BOARD_BL654_DVK ) || \
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defined (CONFIG_BOARD_BL5340_DVK ) || \
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- defined (CONFIG_BOARD_LPCXPRESSO55S36 )
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+ defined (CONFIG_BOARD_LPCXPRESSO55S36 ) || \
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+ defined (CONFIG_SOC_FAMILY_SILABS_S2 )
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.input_positive = ADC_1ST_CHANNEL_INPUT ,
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#endif
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};
Original file line number Diff line number Diff line change 29
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- nucleo_g071rb
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- nucleo_wl55jc
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- lpcxpresso55s36
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+ - xg23_rb4210a
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+ - xg24_dk2601b
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+ - xg24_ek2703a
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+ - xg24_rb4187c
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integration_platforms :
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- nucleo_f207zg
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