@@ -31,10 +31,10 @@ LOG_MODULE_REGISTER(flash_rpi_pico, CONFIG_FLASH_LOG_LEVEL);
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#define DT_DRV_COMPAT raspberrypi_pico_flash_controller
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- #define PAGE_SIZE 256
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+ #define PAGE_SIZE 256
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#define SECTOR_SIZE DT_PROP(DT_CHOSEN(zephyr_flash), erase_block_size)
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#define ERASE_VALUE 0xff
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- #define FLASH_SIZE KB(CONFIG_FLASH_SIZE)
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+ #define FLASH_SIZE KB(CONFIG_FLASH_SIZE)
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static const struct flash_parameters flash_rpi_parameters = {
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.write_block_size = 1 ,
@@ -43,15 +43,16 @@ static const struct flash_parameters flash_rpi_parameters = {
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/**
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* Low level flash functions are based on:
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- * github.com/raspberrypi/pico-bootrom/blob/master/bootrom/program_flash_generic.c
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+ * github.com/raspberrypi/pico-bootrom/blob/master/bootrom/program_flash_generic.c,
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+ * github.com/raspberrypi/pico-bootrom-rp2350/blob/master/src/main/arm/varm_generic_flash.c
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* and
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* github.com/raspberrypi/pico-sdk/blob/master/src/rp2_common/hardware_flash/flash.c
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*/
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#define FLASHCMD_PAGE_PROGRAM 0x02
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- #define FLASHCMD_READ_STATUS 0x05
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+ #define FLASHCMD_READ_STATUS 0x05
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#define FLASHCMD_WRITE_ENABLE 0x06
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- #define BOOT2_SIZE_WORDS 64
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+ #define BOOT2_SIZE_WORDS 64
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enum outover {
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OUTOVER_NORMAL = 0 ,
@@ -83,7 +84,7 @@ static void __no_inline_not_in_flash_func(flash_init_boot2_copyout)(void)
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static void __no_inline_not_in_flash_func (flash_enable_xip_via_boot2 )(void )
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{
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- ((void (* )(void ))((uint32_t )boot2_copyout + 1 ))();
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+ ((void (* )(void ))((uint32_t )boot2_copyout + 1 ))();
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}
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#if PICO_RP2350
@@ -106,38 +107,39 @@ static void __no_inline_not_in_flash_func(flash_rp2350_restore_qmi_cs1)(
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{
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if (flash_devinfo_get_cs_size (1 ) == FLASH_DEVINFO_SIZE_NONE ) {
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/* Case 1: The RP2350 ROM sets QMI to a clean (03h read) configuration
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- during flash_exit_xip(), even though when CS1 is not enabled via
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- FLASH_DEVINFO it does not issue an XIP exit sequence to CS1. In
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- this case, restore the original register config for CS1 as it is
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- still the correct config. */
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+ * during flash_exit_xip(), even though when CS1 is not enabled via
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+ * FLASH_DEVINFO it does not issue an XIP exit sequence to CS1. In
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+ * this case, restore the original register config for CS1 as it is
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+ * still the correct config.
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+ */
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qmi_hw -> m [1 ].timing = state -> timing ;
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qmi_hw -> m [1 ].rcmd = state -> rcmd ;
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qmi_hw -> m [1 ].rfmt = state -> rfmt ;
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} else {
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/* Case 2: If RAM is attached to CS1, and the ROM has issued an XIP
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- exit sequence to it, then the ROM re-initialisation of the QMI
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- registers has actually not gone far enough. The old XIP write mode
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- is no longer valid when the QSPI RAM is returned to a serial
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- command state. Restore the default 02h serial write command config.
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- */
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+ * exit sequence to it, then the ROM re-initialisation of the QMI
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+ * registers has actually not gone far enough. The old XIP write mode
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+ * is no longer valid when the QSPI RAM is returned to a serial
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+ * command state. Restore the default 02h serial write command config.
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+ */
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qmi_hw -> m [1 ].wfmt = QMI_M1_WFMT_RESET ;
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qmi_hw -> m [1 ].wcmd = QMI_M1_WCMD_RESET ;
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}
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}
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#else
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void __no_inline_not_in_flash_func (flash_cs_force )(enum outover over )
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{
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- io_rw_32 * reg = (io_rw_32 * ) (IO_QSPI_BASE + IO_QSPI_GPIO_QSPI_SS_CTRL_OFFSET );
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- * reg = (* reg & ~IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_BITS )
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- | (over << IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_LSB );
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- (void ) * reg ;
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+ io_rw_32 * reg = (io_rw_32 * )(IO_QSPI_BASE + IO_QSPI_GPIO_QSPI_SS_CTRL_OFFSET );
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+ * reg = (* reg & ~IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_BITS ) |
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+ (over << IO_QSPI_GPIO_QSPI_SS_CTRL_OUTOVER_LSB );
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+ (void )* reg ;
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}
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#endif
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int __no_inline_not_in_flash_func (flash_was_aborted )()
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{
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- return * (io_rw_32 * ) (IO_QSPI_BASE + IO_QSPI_GPIO_QSPI_SD1_CTRL_OFFSET )
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- & IO_QSPI_GPIO_QSPI_SD1_CTRL_INOVER_BITS ;
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+ return * (io_rw_32 * )(IO_QSPI_BASE + IO_QSPI_GPIO_QSPI_SD1_CTRL_OFFSET ) &
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+ IO_QSPI_GPIO_QSPI_SD1_CTRL_INOVER_BITS ;
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}
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#if PICO_RP2350
@@ -151,14 +153,17 @@ uint __no_inline_not_in_flash_func(flash_put_get)(uint cs, const uint8_t *tx, ui
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size_t tx_count = count ;
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size_t rx_count = count ;
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+
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while (tx_count || rx_count ) {
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uint32_t status = qmi_hw -> direct_csr ;
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+
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if (tx_count && !(status & QMI_DIRECT_CSR_TXFULL_BITS )) {
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qmi_hw -> direct_tx = (uint32_t )(tx ? * tx ++ : 0 );
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-- tx_count ;
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}
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if (rx_count && !(status & QMI_DIRECT_CSR_RXEMPTY_BITS )) {
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uint8_t rxbyte = (uint8_t )qmi_hw -> direct_rx ;
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+
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if (rx ) {
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* rx ++ = rxbyte ;
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}
@@ -167,16 +172,16 @@ uint __no_inline_not_in_flash_func(flash_put_get)(uint cs, const uint8_t *tx, ui
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}
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/* Wait for BUSY as there may be no RX data at all, e.g. for single-byte SPI commands */
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- while (qmi_hw -> direct_csr & QMI_DIRECT_CSR_BUSY_BITS )
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- ;
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+ while (qmi_hw -> direct_csr & QMI_DIRECT_CSR_BUSY_BITS ) {
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+ }
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/* Disable direct-mode interface and deassert chip select */
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hw_xor_bits (& qmi_hw -> direct_csr , csr_toggle_mask );
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return cs ;
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}
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#else
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void __no_inline_not_in_flash_func (flash_put_get )(const uint8_t * tx , uint8_t * rx , size_t count ,
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- size_t rx_skip )
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+ size_t rx_skip )
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{
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const uint max_in_flight = 16 - 2 ;
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size_t tx_count = count ;
@@ -225,7 +230,7 @@ uint __no_inline_not_in_flash_func(flash_put_get_wrapper)(uint cs, uint8_t cmd,
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}
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#else
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void __no_inline_not_in_flash_func (flash_put_get_wrapper )(uint8_t cmd , const uint8_t * tx ,
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- uint8_t * rx , size_t count )
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+ uint8_t * rx , size_t count )
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{
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flash_cs_force (OUTOVER_LOW );
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ssi_hw -> dr0 = cmd ;
@@ -244,7 +249,7 @@ static ALWAYS_INLINE uint flash_wait_ready(uint cs)
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return cs ;
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}
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#else
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- static ALWAYS_INLINE void flash_wait_ready ()
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+ static ALWAYS_INLINE void flash_wait_ready (void )
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{
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uint8_t status_reg ;
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@@ -261,7 +266,7 @@ static ALWAYS_INLINE uint flash_enable_write(uint cs)
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return flash_put_get (cs , NULL , NULL , 0 );
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}
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#else
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- static ALWAYS_INLINE void flash_enable_write ()
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+ static ALWAYS_INLINE void flash_enable_write (void )
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{
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flash_put_get_wrapper (FLASHCMD_WRITE_ENABLE , NULL , NULL , 0 );
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}
@@ -286,10 +291,11 @@ static ALWAYS_INLINE void flash_put_cmd_addr(uint8_t cmd, uint32_t addr)
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}
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void __no_inline_not_in_flash_func (flash_write_partial_internal )(uint32_t addr , const uint8_t * data ,
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- size_t size )
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+ size_t size )
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{
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#if PICO_RP2350
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uint cs = (addr >> 24 ) & 0x1u ;
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+
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cs = flash_enable_write (cs );
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flash_put_cmd_addr (FLASHCMD_PAGE_PROGRAM , addr );
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flash_put_get (cs , data , NULL , size );
@@ -305,16 +311,18 @@ void __no_inline_not_in_flash_func(flash_write_partial_internal)(uint32_t addr,
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void __no_inline_not_in_flash_func (flash_write_partial )(uint32_t flash_offs , const uint8_t * data ,
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size_t count )
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{
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- rom_connect_internal_flash_fn connect_internal_flash = (rom_connect_internal_flash_fn )
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- rom_func_lookup_inline (ROM_FUNC_CONNECT_INTERNAL_FLASH );
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- rom_flash_exit_xip_fn exit_xip = (rom_flash_exit_xip_fn )
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- rom_func_lookup_inline (ROM_FUNC_FLASH_EXIT_XIP );
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- rom_flash_flush_cache_fn flush_cache = (rom_flash_flush_cache_fn )
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- rom_func_lookup_inline (ROM_FUNC_FLASH_FLUSH_CACHE );
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+ rom_connect_internal_flash_fn connect_internal_flash =
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+ (rom_connect_internal_flash_fn )rom_func_lookup_inline (
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+ ROM_FUNC_CONNECT_INTERNAL_FLASH );
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+ rom_flash_exit_xip_fn exit_xip =
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+ (rom_flash_exit_xip_fn )rom_func_lookup_inline (ROM_FUNC_FLASH_EXIT_XIP );
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+ rom_flash_flush_cache_fn flush_cache =
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+ (rom_flash_flush_cache_fn )rom_func_lookup_inline (ROM_FUNC_FLASH_FLUSH_CACHE );
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flash_init_boot2_copyout ();
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#if PICO_RP2350
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flash_rp2350_qmi_save_state_t qmi_save ;
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+
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flash_rp2350_save_qmi_cs1 (& qmi_save );
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#endif
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@@ -337,6 +345,8 @@ static bool is_valid_range(off_t offset, uint32_t size)
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static int flash_rpi_read (const struct device * dev , off_t offset , void * data , size_t size )
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{
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+ ARG_UNUSED (dev );
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+
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if (size == 0 ) {
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return 0 ;
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}
@@ -357,13 +367,15 @@ static int flash_rpi_write(const struct device *dev, off_t offset, const void *d
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size_t bytes_to_write ;
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uint8_t * data_pointer = (uint8_t * )data ;
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+ ARG_UNUSED (dev );
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+
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if (size == 0 ) {
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return 0 ;
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}
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if (!is_valid_range (offset , size )) {
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- LOG_ERR ("Write range exceeds the flash boundaries. Offset=%#lx, Size=%u" ,
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- offset , size );
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+ LOG_ERR ("Write range exceeds the flash boundaries. Offset=%#lx, Size=%u" , offset ,
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+ size );
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return - EINVAL ;
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}
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@@ -406,14 +418,14 @@ static int flash_rpi_erase(const struct device *dev, off_t offset, size_t size)
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}
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if (!is_valid_range (offset , size )) {
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- LOG_ERR ("Erase range exceeds the flash boundaries. Offset=%#lx, Size=%u" ,
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- offset , size );
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+ LOG_ERR ("Erase range exceeds the flash boundaries. Offset=%#lx, Size=%u" , offset ,
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+ size );
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return - EINVAL ;
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}
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if ((offset % SECTOR_SIZE ) || (size % SECTOR_SIZE )) {
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LOG_ERR ("Erase range is not a multiple of the sector size. Offset=%#lx, Size=%u" ,
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- offset , size );
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+ offset , size );
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return - EINVAL ;
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}
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@@ -441,7 +453,7 @@ static const struct flash_pages_layout flash_rpi_pages_layout = {
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};
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void flash_rpi_page_layout (const struct device * dev , const struct flash_pages_layout * * layout ,
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- size_t * layout_size )
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+ size_t * layout_size )
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{
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* layout = & flash_rpi_pages_layout ;
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* layout_size = 1 ;
@@ -459,5 +471,5 @@ static DEVICE_API(flash, flash_rpi_driver_api) = {
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#endif /* CONFIG_FLASH_PAGE_LAYOUT */
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};
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- DEVICE_DT_INST_DEFINE (0 , NULL , NULL , NULL , NULL , POST_KERNEL ,
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- CONFIG_FLASH_INIT_PRIORITY , & flash_rpi_driver_api );
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+ DEVICE_DT_INST_DEFINE (0 , NULL , NULL , NULL , NULL , POST_KERNEL , CONFIG_FLASH_INIT_PRIORITY ,
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+ & flash_rpi_driver_api );
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