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boards: st: nucleo_wba65ri: Add ns variant for TF-M support
Add variant ns to nucleo_wba65ri board to embed TF-M in the SoC secure world. The flash layout is synced with the layout defined in Zephyr TF-M integration of platform STM32WBA65I. - samples/tfm_integration/psa_crypto - samples/tfm_integration/psa_protected_storage - samples/tfm_integration/tfm_ipc - samples/tfm_integration/tfm_regression_test - samples/tfm_integration/tfm_secure_partition - tests/subsys/secure_storage/psa/crypto - tests/subsys/secure_storage/psa/its (with CONFIG_TFM_ITS_MAX_ASSET_SIZE_OVERRIDE=y and CONFIG_TFM_ITS_MAX_ASSET_SIZE=256) Signed-off-by: Etienne Carriere <[email protected]>
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‎boards/st/nucleo_wba65ri/Kconfig.defconfig

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default y
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depends on SPI
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if BUILD_WITH_TFM
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# Not defining LIBC malloc arena has the effect of declaring all available RAM
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# as available for malloc.
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# This currently conflicts with TF-M MPU setting, resulting in a hard fault.
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# Define a specific size to avoid this situation.
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config COMMON_LIBC_MALLOC_ARENA_SIZE
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default 2048
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endif # BUILD_WITH_TFM
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endif # BOARD_NUCLEO_WBA65RI

‎boards/st/nucleo_wba65ri/board.cmake

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# SPDX-License-Identifier: Apache-2.0
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board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
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if(CONFIG_BUILD_WITH_TFM)
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set(FLASH_BASE_ADDRESS_S 0x0C000000)
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# Flash merged TF-M + Zephyr binary
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set_property(TARGET runners_yaml_props_target PROPERTY hex_file tfm_merged.hex)
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if (CONFIG_HAS_FLASH_LOAD_OFFSET)
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MATH(EXPR TFM_HEX_BASE_ADDRESS_NS "${FLASH_BASE_ADDRESS_S}+${CONFIG_FLASH_LOAD_OFFSET}")
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else()
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set(TFM_HEX_BASE_ADDRESS_NS ${TFM_FLASH_BASE_ADDRESS_S})
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endif()
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# System entry point is TF-M vector, located 1kByte after tfm_fmw_partition in DTS
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get_target_property(TFM_FWM_NODE_NAME devicetree_target "DT_NODELABEL|slot0_secure_partition")
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string(REGEX REPLACE ".*@([^@]+)$" "\\1" TFM_FWM_OFFSET "${TFM_FWM_NODE_NAME}")
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if(NOT TFM_FWM_OFFSET)
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message(FATAL_ERROR "Could not find TF-M firmware offset from node label slot0_secure_partition")
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endif()
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math(EXPR TFM_FWM_BOOT_ADDR "0x${TFM_FWM_OFFSET}+${FLASH_BASE_ADDRESS_S}+0x400")
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board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw"
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"--erase" "--start-address=${TFM_FWM_BOOT_ADDR}"
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)
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else()
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board_runner_args(stm32cubeprogrammer "--port=swd" "--reset-mode=hw")
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endif()
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include(${ZEPHYR_BASE}/boards/common/stm32cubeprogrammer.board.cmake)
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include(${ZEPHYR_BASE}/boards/common/openocd.board.cmake)

‎boards/st/nucleo_wba65ri/board.yml

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vendor: st
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socs:
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- name: stm32wba65xx
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variants:
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- name: ns

‎boards/st/nucleo_wba65ri/doc/nucleo_wba65ri.rst

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.. zephyr:board-supported-hw::
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Zephyr board options
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====================
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Nucleo WBA65RI board integrates an SoC with Cortex-M33 architecture. Zephyr
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provides support for building for both Secure and Non-Secure firmware.
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The BOARD options are summarized below:
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+---------------------------------+------------------------------------------+
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| BOARD | Description |
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+=================================+==========================================+
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| stm32wba65i_dk1 | For building TrustZone Disabled firmware |
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+---------------------------------+------------------------------------------+
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| stm32wba65i_dk1/stm32wba65xx/ns | For building Non-Secure firmware |
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+---------------------------------+------------------------------------------+
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Here are the instructions to build Zephyr with a non-secure configuration,
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using :zephyr:code-sample:`tfm_ipc` sample:
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.. code-block:: console
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$ west build -b nucleo_wba65ri/stm32wba65xx/ns samples/tfm_integration/tfm_ipc/
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Once done, before flashing, you need to first run a generated script that
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will set platform option bytes config and erase platform (among others,
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option bit TZEN will be set).
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.. code-block:: bash
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$ ./build/tfm/api_ns/regression.sh
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$ west flash
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Please note that, after having programmed the board for a TrustZone enabled system
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(e.g. with ``./build/tfm/api_ns/regression.sh``), the SoC TZEN option byte is enabled
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and you will need to operate specific sequence to disable this TZEN Option Byte
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configuration to get your board back in normal state for booting with a TrustZone
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disabled system (e.g. without TF-M support).
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You can still use STM32CubeProgrammer_ to disable the SoC TZEN Option Byte config.
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Connections and IOs
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===================
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‎boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.dts

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/*
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* Copyright (c) 2025 STMicroelectronics
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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/dts-v1/;
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#include "nucleo_wba65ri.dts"
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/ {
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chosen {
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zephyr,code-partition = &slot0_ns_partition;
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};
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};
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&flash0 {
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/delete-node/ partitions;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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boot_partition: partition@0 {
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label = "bootstage";
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reg = <0 DT_SIZE_K(144)>;
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};
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slot0_secure_partition: partition@24000 {
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label = "image-secure";
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reg = <0x24000 DT_SIZE_K(384)>;
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};
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slot0_ns_partition: partition@84000 {
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label = "image-non-secure";
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reg = <0x84000 DT_SIZE_K(384)>;
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};
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storage_partition: partition@e4000 {
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label = "storage";
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reg = <0xe4000 (DT_SIZE_K(112) + DT_SIZE_M(1))>;
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};
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};
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};

‎boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns.yaml

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identifier: nucleo_wba65ri/stm32wba65xx/ns
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name: ST STM32WBA65I Discovery kit with TF-M and non-secure
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type: mcu
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arch: arm
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toolchain:
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- zephyr
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- gnuarmemb
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supported:
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- gpio
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- i2c
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- spi
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- adc
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- rng
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- arduino_gpio
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- arduino_i2c
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- arduino_spi
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ram: 512
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flash: 2048
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vendor: st

‎boards/st/nucleo_wba65ri/nucleo_wba65ri_stm32wba65xx_ns_defconfig

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# SPDX-License-Identifier: Apache-2.0
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# Copyright (c) 2025 STMicroelectronics
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# enable uart driver
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CONFIG_SERIAL=y
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# enable GPIO
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CONFIG_GPIO=y
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# console
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CONFIG_CONSOLE=y
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CONFIG_UART_CONSOLE=y
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# Enable MPU
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CONFIG_ARM_MPU=y
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# Enable HW stack protection
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CONFIG_HW_STACK_PROTECTION=y
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# Enable the internal SMPS regulator
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CONFIG_POWER_SUPPLY_DIRECT_SMPS=y
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# Enable TZ non-secure configuration
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CONFIG_ARM_TRUSTZONE_M=y
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CONFIG_RUNTIME_NMI=y
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CONFIG_TRUSTED_EXECUTION_NONSECURE=y
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CONFIG_BUILD_WITH_TFM=y
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CONFIG_TFM_BL2=n

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