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STM32 Timer: add kernel clocks support #93198
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STM32 Timer: add kernel clocks support #93198
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@@ -107,6 +107,8 @@ | |||
#define STM32_ADC12_PRESCALER DT_PROP(DT_NODELABEL(rcc), adc12_prescaler) | |||
#define STM32_ADC34_PRESCALER DT_PROP(DT_NODELABEL(rcc), adc34_prescaler) | |||
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#define STM32_TIMER_PRESCALER DT_PROP(DT_NODELABEL(rcc), timpre) |
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Considering that there are checks #if defined(STM32_TIMER_PRESCALER)
shouldn't it be wrapped with:
#if DT_NODE_HAS_PROP(DT_NODELABEL(rcc), timpre)
...
#endif
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Removed STM32_TIMER_PRESCALER and replaced by DT_NODE_HAS_PROP everywhere
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IMHO: it was cleaner with a separately defined prescaler.
However, it is clear how you want to use it. In that case, the DT_NODE_HAS_PROP
is not the way, my bad.
The property is bool
, and based on #90609 (comment) it is better to stick with:
#define STM32_TIMER_PRESCALER_ENABLED DT_PROP(DT_NODELABEL(rcc), timpre)
and use IS_ENABLED
where appropriate:
if (IS_ENABLED(STM32_TIMER_PRESCALER_ENABLED)) {
...
} else {
...
}
and value checks:
#if STM32_TIMER_PRESCALER_ENABLED
...
#endif
instead of #if defined(STM32_TIMER_PRESCALER)
, as it is always defined when DT_PROP
is used.
Add initial support for timer kernel clock for STM32. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32C0 Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32F0 Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32F1 Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32F3. Also reorganizes the timer instances: - TIM3 is not available on F301, F318, F302x6 or x8, but is available for all others - TIM4 is available on F302xB and higher, F303xB and higher, F358, F398, F373 and F378 - TIM7 is not available on F301, F318, F302, but is available for all others - TIM8 is only available on F303xB and higher, F358 and F398 - TIM20 is only available on F303xD and xE,and on F398 Depending of the SoC version, some timers have access to one or two distinct clock sources. Timers with NO_SEL selection only have access to the base TIMPLCKx clock, those defined with TIMx_SEL(0) can use another source clock: STM32_SRC_TIMPLLCLK. That's why some clocks are redefined. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32F4. Define a new RCC binding to add the timer prescaler property (timpre). This new binding is used for all STM32F4 except F405/F407/F415/F417 who do not support it. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32F2. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32F7. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32G0. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32G4. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32H5. Define a new RCC binding for H5 with the timer prescaler property (timpre). Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32H7. Define a new property for the timer prescaler in the RCC binding of H7. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32H7RS. Define a new property for the timer prescaler in the RCC binding of H7RS. Also fix the clock bus of TIM16 and TIM17 (they are on APB2 instead of 1) Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32L0. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32L1. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32L4. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32L5. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32U0. Contrary to other series, on U0, TIMPCLK is always equal to PCLK, so no need to define it, we can use PCLK directly. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32U5. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32WB. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32WBA. Signed-off-by: Guillaume Gautier <[email protected]>
Add support for timer kernel clock for STM32WL. Signed-off-by: Guillaume Gautier <[email protected]>
Add a macro to know whether the instance's parent has a kernel clock. Necessary for Counter and PWM drivers whose clocks are defined in their parents. Signed-off-by: Guillaume Gautier <[email protected]>
Now that the timer kernel clocks are defined in device tree, use the clock get API to fetch the clock frequency instead of calculating the value in the driver. Removes the now unused function counter_stm32_get_tim_clk. Signed-off-by: Guillaume Gautier <[email protected]>
Now that the timer kernel clocks are defined in device tree, use the clock get API to fetch the clock frequency instead of calculating the value in the driver. Removes the now unused function get_tim_clk. Signed-off-by: Guillaume Gautier <[email protected]>
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This PR adds support the support of kernel source clocks for the STM32 timer driver.
For most STM32 (with the exception of U0), the kernel source clock of the timers is the AHB clock if APB divider is 1 or twice APB clock otherwise.
For most series/socs/timers, TIMPCLK is the only kernel clock available. This is represented by the use of the NO_SEL macro in the clock property of the timer dts node. This should not be modified.
But some timers of some series/socs can use another kernel clock. In that case, the clock property is defined with a macro TIMx_SEL(0), and it can be modified by user to select another source.
Some series also have a timer prescaler (timpre property). When enabled, the kernel source clock is AHB if APB divider is 1 or 2, or four times APB otherwise.
With the source clock frequency calculation now integrated into the clock driver, the calculations that were present in the counter and the PWM drivers are removed.
This PR apply changes on all STM32 series that currently have timer support (this excludes N6 and U3, support can be added later).