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PROT PPU ECC Injection

This code example shows how to perform the error injection onto Error Correcting Code (ECC) of Peripheral Protection Unit (PPU).

Device

The device used in this code example (CE) is:

Board

The board used for testing is:

Scope of work

The static random-access memory (SRAM) stored protection information of PPU is supported by ECC. This ECC supports single error correction and double error detection (SECDED). In this example, an ECC error is injected into the SRAM that contains PPU configuration.

Introduction

Protection Unit

  • An address range that is accessed by the transfer
    • Subregion: An address range is partitioned into eight equally-sized subregions and subregion can individual disables
  • Access attributes such as:
    • Read/write attribute
    • Execute attribute to distinguish a code access from a data access
    • User/privilege attribute to distinguish access; for example, OS/kernel access from a task/thread access
    • Secure/non-secure attribute to distinguish a secure access from a non-secure access; the Arm Cortex-M CPUs do not natively support this attribute
    • A protection context attribute to distinguish accesses from different protection contexts; for Peripheral-DMA (P-DMA) and Memory-DMA (M-DMA), this attribute is extended with a channel identifier, to distinguish accesses from different channels
  • Memory protection
  • Provided by memory protection units (MPUs) and shared memory protection units (SMPUs)
    • MPUs distinguish user and privileged accesses from a single bus master
    • SMPUs distinguish between different protection contexts and between secure and non-secure accesses
  • Peripheral protection
    • Provided by peripheral protection units (PPUs)
    • The PPUs distinguish between different protection contexts; they also distinguish secure from non-secure accesses and user mode accesses from privileged mode accesses
  • Protection pair structure
  • Software Protection Unit (SWPU): SWPUs define flash write (or erase) permissions, and eFuse read and write permissions. An SWPU comprises of the following:
    • Flash Write Protection Unit (FWPU)
    • eFuse Read Protection Unit (ERPU)
    • eFuse Write Protection Unit (EWPU)

More details can be found in Technical Reference Manual (TRM), Registers TRM and Data Sheet.

Hardware setup

This CE has been developed for:

  • TRAVEO™ T2G evaluation kit (KIT_T2G-B-H_EVK)

    No changes are required from the board's default settings.

  • TRAVEO™ T2G Body High Lite evaluation kit (KIT_T2G-B-H_LITE)

    No changes are required from the board's default settings.

Implementation

This CE demonstrates the PPU's feature to inject ECC parity value to verify that the ECC fault operates properly; it consists of three different tests, each generating a no error, 1-bit correctable error, and 2-bit uncorrectable error. The result will be output to the terminal.

STDOUT setting

Initialization of the GPIO for UART is done in the cy_retarget_io_init() function.

  • Initialize the pin specified by CYBSP_DEBUG_UART_TX as UART TX, the pin specified by CYBSP_DEBUG_UART_RX as UART RX (these pins are connected to KitProg3 COM port)
  • The serial port parameters are set to 8N1 and 115200 baud

ECC error injection

  • At first, this CE clears the fault status by calling Cy_SysFault_ClearStatus(). Then enable capturing PPU ECC faults by calling Cy_SysFault_SetMaskByIdx().
  • In each test, the parity value is calculated based on the value and address of testing target attribute. The calculation is done by the function generate_Parity(). See TRM for details on how parity is calculated.
  • The fault status as a parity injection result is confirmed by Cy_SysFault_GetErrorSource().

LED control

This CE blinks the user LED if all the tests are successfully finished. Initialization of the GPIO port pin is done once in the cyhal_gpio_init() function.

  • Initialize the pin specified by CYBSP_USER_LED1 as output (initial level = H, LED turns off)

The GPIO is controlled when a fault occurs as a handle_Fault_IRQ interrupt.

Run and Test

For this example, a terminal emulator is required to display outputs and receive keys pressed. You can install a terminal emulator if you do not have one. In this example, Tera Term was used as the terminal emulator.

After code compilation, perform the following steps to flash the device:

  1. Connect the board to your PC using the provided USB cable through the KitProg3 USB connector.
  2. Open a terminal program and select the KitProg3 COM port. Set the serial port parameters to 8N1 and 115200 baud.
  3. Program the board using one of the following:
    • Select the code example project in the Project Explorer.
    • In the Quick Panel, scroll down, and click [Project Name] Program (KitProg3_MiniProg4).
  4. After programming, the code example starts automatically. Confirm that the messages are displayed on the UART terminal.
    • Terminal output on program startup

  5. You can debug the example to step through the code. In the IDE, use the [Project Name] Debug (KitProg3_MiniProg4) configuration in the Quick Panel. For details, see the "Program and debug" section in the Eclipse IDE for ModusToolbox™ software user guide.

Note: (Only while debugging) On the CM7 CPU, some code in main() may execute before the debugger halts at the beginning of main(). This means that some code executes twice: once before the debugger stops execution, and again after the debugger resets the program counter to the beginning of main(). See KBA231071 to learn about this and for the workaround.

References

Relevant Application notes are:

  • AN235305 - GETTING STARTED WITH TRAVEO™ T2G FAMILY MCUS IN MODUSTOOLBOX™
  • AN219843 - Protection configuration in TRAVEO™ T2G MCU

ModusToolbox™ is available online:

Associated TRAVEO™ T2G MCUs can be found on:

More code examples can be found on the GIT repository:

For additional trainings, visit our webpage:

For questions and support, use the TRAVEO™ T2G Forum: