Analog Comparator Controller (ACC)

Perifericos-uC/ACC/ACC_EXAMPLE/ACC_EXAMPLE.atsln

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+
+Microsoft Visual Studio Solution File, Format Version 12.00
+# Atmel Studio Solution File, Format Version 11.00
+VisualStudioVersion = 14.0.23107.0
+MinimumVisualStudioVersion = 10.0.40219.1
+Project("{54F91283-7BC4-4236-8FF9-10F437C3AD48}") = "ACC_EXAMPLE", "ACC_EXAMPLE\ACC_EXAMPLE.cproj", "{DCE6C7E3-EE26-4D79-826B-08594B9AD897}"
+EndProject
+Global
+	GlobalSection(SolutionConfigurationPlatforms) = preSolution
+		Debug|ARM = Debug|ARM
+		Release|ARM = Release|ARM
+	EndGlobalSection
+	GlobalSection(ProjectConfigurationPlatforms) = postSolution
+		{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|ARM.ActiveCfg = Debug|ARM
+		{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Debug|ARM.Build.0 = Debug|ARM
+		{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|ARM.ActiveCfg = Release|ARM
+		{DCE6C7E3-EE26-4D79-826B-08594B9AD897}.Release|ARM.Build.0 = Release|ARM
+	EndGlobalSection
+	GlobalSection(SolutionProperties) = preSolution
+		HideSolutionNode = FALSE
+	EndGlobalSection
+EndGlobal

Perifericos-uC/ACC/ACC_EXAMPLE/ACC_EXAMPLE/ACC_EXAMPLE.componentinfo.xml

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+<?xml version="1.0" encoding="utf-8"?>
+<Store xmlns:i="http://www.w3.org/2001/XMLSchema-instance" xmlns="AtmelPackComponentManagement">
+	<ProjectComponents />
+</Store>

Perifericos-uC/ACC/ACC_EXAMPLE/ACC_EXAMPLE/src/ASF/common/services/clock/genclk.h

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+/**
+ * \file
+ *
+ * \brief Generic clock management
+ *
+ * Copyright (c) 2010-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.  TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+/*
+ * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
+ */
+#ifndef CLK_GENCLK_H_INCLUDED
+#define CLK_GENCLK_H_INCLUDED
+
+#include "parts.h"
+
+#if SAM3S
+# include "sam3s/genclk.h"
+#elif SAM3U
+# include "sam3u/genclk.h"
+#elif SAM3N
+# include "sam3n/genclk.h"
+#elif SAM3XA
+# include "sam3x/genclk.h"
+#elif SAM4S
+# include "sam4s/genclk.h"
+#elif SAM4L
+# include "sam4l/genclk.h"
+#elif SAM4E
+# include "sam4e/genclk.h"
+#elif SAM4N
+# include "sam4n/genclk.h"
+#elif SAM4C
+# include "sam4c/genclk.h"
+#elif SAM4CM
+# include "sam4cm/genclk.h"
+#elif SAM4CP
+# include "sam4cp/genclk.h"
+#elif SAMG
+# include "samg/genclk.h"
+#elif SAMV71
+# include "samv71/genclk.h"
+#elif SAMV70
+# include "samv70/genclk.h"
+#elif SAME70
+# include "same70/genclk.h"
+#elif SAMS70
+# include "sams70/genclk.h"
+#elif (UC3A0 || UC3A1)
+# include "uc3a0_a1/genclk.h"
+#elif UC3A3
+# include "uc3a3_a4/genclk.h"
+#elif UC3B
+# include "uc3b0_b1/genclk.h"
+#elif UC3C
+# include "uc3c/genclk.h"
+#elif UC3D
+# include "uc3d/genclk.h"
+#elif UC3L
+# include "uc3l/genclk.h"
+#else
+# error Unsupported chip type
+#endif
+
+/**
+ * \ingroup clk_group
+ * \defgroup genclk_group Generic Clock Management
+ *
+ * Generic clocks are configurable clocks which run outside the system
+ * clock domain. They are often connected to peripherals which have an
+ * asynchronous component running independently of the bus clock, e.g.
+ * USB controllers, low-power timers and RTCs, etc.
+ *
+ * Note that not all platforms have support for generic clocks; on such
+ * platforms, this API will not be available.
+ *
+ * @{
+ */
+
+/**
+ * \def GENCLK_DIV_MAX
+ * \brief Maximum divider supported by the generic clock implementation
+ */
+/**
+ * \enum genclk_source
+ * \brief Generic clock source ID
+ *
+ * Each generic clock may be generated from a different clock source.
+ * These are the available alternatives provided by the chip.
+ */
+
+//! \name Generic clock configuration
+//@{
+/**
+ * \struct genclk_config
+ * \brief Hardware representation of a set of generic clock parameters
+ */
+/**
+ * \fn void genclk_config_defaults(struct genclk_config *cfg,
+ *              unsigned int id)
+ * \brief Initialize \a cfg to the default configuration for the clock
+ * identified by \a id.
+ */
+/**
+ * \fn void genclk_config_read(struct genclk_config *cfg, unsigned int id)
+ * \brief Read the currently active configuration of the clock
+ * identified by \a id into \a cfg.
+ */
+/**
+ * \fn void genclk_config_write(const struct genclk_config *cfg,
+ *              unsigned int id)
+ * \brief Activate the configuration \a cfg on the clock identified by
+ * \a id.
+ */
+/**
+ * \fn void genclk_config_set_source(struct genclk_config *cfg,
+ *              enum genclk_source src)
+ * \brief Select a new source clock \a src in configuration \a cfg.
+ */
+/**
+ * \fn void genclk_config_set_divider(struct genclk_config *cfg,
+ *              unsigned int divider)
+ * \brief Set a new \a divider in configuration \a cfg.
+ */
+/**
+ * \fn void genclk_enable_source(enum genclk_source src)
+ * \brief Enable the source clock \a src used by a generic clock.
+ */
+ //@}
+
+//! \name Enabling and disabling Generic Clocks
+//@{
+/**
+ * \fn void genclk_enable(const struct genclk_config *cfg, unsigned int id)
+ * \brief Activate the configuration \a cfg on the clock identified by
+ * \a id and enable it.
+ */
+/**
+ * \fn void genclk_disable(unsigned int id)
+ * \brief Disable the generic clock identified by \a id.
+ */
+//@}
+
+/**
+ * \brief Enable the configuration defined by \a src and \a divider
+ * for the generic clock identified by \a id.
+ *
+ * \param id      The ID of the generic clock.
+ * \param src     The source clock of the generic clock.
+ * \param divider The divider used to generate the generic clock.
+ */
+static inline void genclk_enable_config(unsigned int id, enum genclk_source src, unsigned int divider)
+{
+	struct genclk_config gcfg;
+
+	genclk_config_defaults(&gcfg, id);
+	genclk_enable_source(src);
+	genclk_config_set_source(&gcfg, src);
+	genclk_config_set_divider(&gcfg, divider);
+	genclk_enable(&gcfg, id);
+}
+
+//! @}
+
+#endif /* CLK_GENCLK_H_INCLUDED */

Perifericos-uC/ACC/ACC_EXAMPLE/ACC_EXAMPLE/src/ASF/common/services/clock/osc.h

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+/**
+ * \file
+ *
+ * \brief Oscillator management
+ *
+ * Copyright (c) 2010-2018 Microchip Technology Inc. and its subsidiaries.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Subject to your compliance with these terms, you may use Microchip
+ * software and any derivatives exclusively with Microchip products.
+ * It is your responsibility to comply with third party license terms applicable
+ * to your use of third party software (including open source software) that
+ * may accompany Microchip software.
+ *
+ * THIS SOFTWARE IS SUPPLIED BY MICROCHIP "AS IS". NO WARRANTIES,
+ * WHETHER EXPRESS, IMPLIED OR STATUTORY, APPLY TO THIS SOFTWARE,
+ * INCLUDING ANY IMPLIED WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY,
+ * AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT WILL MICROCHIP BE
+ * LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL OR CONSEQUENTIAL
+ * LOSS, DAMAGE, COST OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
+ * SOFTWARE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
+ * POSSIBILITY OR THE DAMAGES ARE FORESEEABLE.  TO THE FULLEST EXTENT
+ * ALLOWED BY LAW, MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY
+ * RELATED TO THIS SOFTWARE WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY,
+ * THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR THIS SOFTWARE.
+ *
+ * \asf_license_stop
+ *
+ */
+/*
+ * Support and FAQ: visit <a href="https://www.microchip.com/support/">Microchip Support</a>
+ */
+#ifndef OSC_H_INCLUDED
+#define OSC_H_INCLUDED
+
+#include "parts.h"
+#include "conf_clock.h"
+
+#if SAM3S
+# include "sam3s/osc.h"
+#elif SAM3XA
+# include "sam3x/osc.h"
+#elif SAM3U
+# include "sam3u/osc.h"
+#elif SAM3N
+# include "sam3n/osc.h"
+#elif SAM4S
+# include "sam4s/osc.h"
+#elif SAM4E
+# include "sam4e/osc.h"
+#elif SAM4C
+# include "sam4c/osc.h"
+#elif SAM4CM
+# include "sam4cm/osc.h"
+#elif SAM4CP
+# include "sam4cp/osc.h"
+#elif SAM4L
+# include "sam4l/osc.h"
+#elif SAM4N
+# include "sam4n/osc.h"
+#elif SAMG
+# include "samg/osc.h"
+#elif SAMV71
+# include "samv71/osc.h"
+#elif SAMV70
+# include "samv70/osc.h"
+#elif SAME70
+# include "same70/osc.h"
+#elif SAMS70
+# include "sams70/osc.h"
+#elif (UC3A0 || UC3A1)
+# include "uc3a0_a1/osc.h"
+#elif UC3A3
+# include "uc3a3_a4/osc.h"
+#elif UC3B
+# include "uc3b0_b1/osc.h"
+#elif UC3C
+# include "uc3c/osc.h"
+#elif UC3D
+# include "uc3d/osc.h"
+#elif UC3L
+# include "uc3l/osc.h"
+#elif XMEGA
+# include "xmega/osc.h"
+#else
+# error Unsupported chip type
+#endif
+
+/**
+ * \ingroup clk_group
+ * \defgroup osc_group Oscillator Management
+ *
+ * This group contains functions and definitions related to configuring
+ * and enabling/disabling on-chip oscillators. Internal RC-oscillators,
+ * external crystal oscillators and external clock generators are
+ * supported by this module. What all of these have in common is that
+ * they swing at a fixed, nominal frequency which is normally not
+ * adjustable.
+ *
+ * \par Example: Enabling an oscillator
+ *
+ * The following example demonstrates how to enable the external
+ * oscillator on XMEGA A and wait for it to be ready to use. The
+ * oscillator identifiers are platform-specific, so while the same
+ * procedure is used on all platforms, the parameter to osc_enable()
+ * will be different from device to device.
+ * \code
+	osc_enable(OSC_ID_XOSC);
+	osc_wait_ready(OSC_ID_XOSC); \endcode
+ *
+ * \section osc_group_board Board-specific Definitions
+ * If external oscillators are used, the board code must provide the
+ * following definitions for each of those:
+ *   - \b BOARD_<osc name>_HZ: The nominal frequency of the oscillator.
+ *   - \b BOARD_<osc name>_STARTUP_US: The startup time of the
+ *     oscillator in microseconds.
+ *   - \b BOARD_<osc name>_TYPE: The type of oscillator connected, i.e.
+ *     whether it's a crystal or external clock, and sometimes what kind
+ *     of crystal it is. The meaning of this value is platform-specific.
+ *
+ * @{
+ */
+
+//! \name Oscillator Management
+//@{
+/**
+ * \fn void osc_enable(uint8_t id)
+ * \brief Enable oscillator \a id
+ *
+ * The startup time and mode value is automatically determined based on
+ * definitions in the board code.
+ */
+/**
+ * \fn void osc_disable(uint8_t id)
+ * \brief Disable oscillator \a id
+ */
+/**
+ * \fn osc_is_ready(uint8_t id)
+ * \brief Determine whether oscillator \a id is ready.
+ * \retval true Oscillator \a id is running and ready to use as a clock
+ * source.
+ * \retval false Oscillator \a id is not running.
+ */
+/**
+ * \fn uint32_t osc_get_rate(uint8_t id)
+ * \brief Return the frequency of oscillator \a id in Hz
+ */
+
+#ifndef __ASSEMBLY__
+
+/**
+ * \brief Wait until the oscillator identified by \a id is ready
+ *
+ * This function will busy-wait for the oscillator identified by \a id
+ * to become stable and ready to use as a clock source.
+ *
+ * \param id A number identifying the oscillator to wait for.
+ */
+static inline void osc_wait_ready(uint8_t id)
+{
+	while (!osc_is_ready(id)) {
+		/* Do nothing */
+	}
+}
+
+#endif /* __ASSEMBLY__ */
+
+//@}
+
+//! @}
+
+#endif /* OSC_H_INCLUDED */