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HDLGen-ChatGPT
HDLGen-ChatGPT PublicHDLGen-ChatGPT, works in tandem with ChatGPT chat interface to enable fast digital systems design and test specification capture, and automatic generation of both VHDL and Verilog models, and testb…
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PYNQ-SoC-Builder
PYNQ-SoC-Builder PublicThis project automates process of creating a PYNQ Z1/Z2 Overlay in Vivado, generates a custom Juypter Notebook template and uploads to a target PYNQ FPGA.
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- PYNQ-SoC-Builder Public
This project automates process of creating a PYNQ Z1/Z2 Overlay in Vivado, generates a custom Juypter Notebook template and uploads to a target PYNQ FPGA.
Logicademy/PYNQ-SoC-Builder’s past year of commit activity - HDLGen-ChatGPT Public
HDLGen-ChatGPT, works in tandem with ChatGPT chat interface to enable fast digital systems design and test specification capture, and automatic generation of both VHDL and Verilog models, and testbenches, and AMD Vivado and Intel Quartus Electronic Design Automation (EDA) project
Logicademy/HDLGen-ChatGPT’s past year of commit activity
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