- π Hi, Iβm Matthieu
- π Iβm interested in programmable hardware (FPGAs); Python and Linux.
- π± Iβm currently learning to solve programming challenges; streamlining FPGA project flows; and software-defined radio.
Pinned Loading
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vivado-vhdl-time-const-calc
vivado-vhdl-time-const-calc PublicXilinx Vivado issue with VHDL time type handling
Tcl
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vivado-tcl-proc-name-poc
vivado-tcl-proc-name-poc PublicProof-of-concept for triggering a bug in Vivado
Tcl
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fpga-jtag-axi-demo
fpga-jtag-axi-demo PublicBasic JTAG / AXI demonstration on Xilinx's FPGA.
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advent-of-code
advent-of-code PublicSolutions to ππ https://adventofcode.com/ ππ programming puzzles written in Python.
Python 2
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picorv32
picorv32 PublicForked from YosysHQ/picorv32
PicoRV32 - A Size-Optimized RISC-V CPU
Verilog
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