TheTensorCoreProject

SystemVerilog implementation of Nvidia's SIMT CUDA, Hybrid-Precision Tensor Core, and Google's Systolic Array TPU MXU GEMM Operations. These modules are by no means really emulating the actual microarchitecture executing CUDA/Tensor Core instructions, instead they're simply performing the same operation for direct usage in FPGA designs.

Tensor Core Versions

TensorCore v0: Volta Architecture [FP16MUL FP32ADD]

TensorCore v1: Ampere Architecture [TF32MUL FP32ADD / BF16MUL FP32ADD] + Fine-Grained Structured Sparsity

TensorCore v2: Hopper Architecture [FP8(E5M2/E4M3)MUL FP16ADD]