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cpu/samd5: improve clock initialisation XOSC32 and FDPLL #21631
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crasbe
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Jul 30, 2025
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benpicco
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The spell checker has some comments 😉 |
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i ran a test ULP vs XOSC32
results
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I tested this PR with hardware that reliably fails with the old initialization code. With this patch the MCU reliably boots and the RTC is still correct to the second. |
- valid clock XOSC32 startup time - avoid gclk roundtrip for FDPLL when XOSC32 is used
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benpicco
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Aug 4, 2025
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Area: cpu
Area: CPU/MCU ports
CI: ready for build
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Platform: ARM
Platform: This PR/issue effects ARM-based platforms
Type: bug
The issue reports a bug / The PR fixes a bug (including spelling errors)
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Contribution description
current samd5 initialization is strange and might fail ( hardware dependant) while initializing this fixes that.
The failure is know a POR issue.
Testing procedure
read and compare to documentation
Issues/PRs references