[APX] fix a few emitter bugs.

[Ruihan-Yin]

This PR fixes 2 bugs:

1. correct LEA encoding.
2. Disable EVEX compressed displacement for APX extended EVEX.
3. Disable EGPR allocation when EVEX is not available for ShiftRotate and Mul.
4. a merge error from the ZU enabling PR - [APX] Enable APX-EVEX.ZU for SETcc instructions #117258

A few more explanation for the second fix:
In the current context, APX extended EVEX is specifically referring to the EVEX functionality for those instructions originally without EVEX and promoted to EVEX space because of some new features like: NDD, NF, ZU, etc. As these instructions do not have tuple information and the scaling factor N when using disp8 is constantly treated as 1, so the optimization in TryEvexCompressedDisplacement, where the optimization tries to use embedded broadcast to get a smaller displacement - disp8 instead of disp32, is not really necessary for this group of instructions as the scaling factor N is not affected by EVEX.b, whether to use disp8 or disp32 should purely depend on dspInByte. (And in fact EVEX.b has different semantic in the extended EVEX case, hence this bug adds EVEX to legacy instructions in some unnecessary scenarios and enables some unexpected features - EVEX.NF as how compressed displacement is defined on instruction descriptor.). The PR fixes this by skipping the optimization on instruction without tuple information.

p.s. I understand that we have logged an issue improving the emitter logics for APX-EVEX: letting TakesEvexPrefix and IsEvexEncodableInstruction manage all the EVEX encodable instructions including APX extended ones. But it might be better to have the emitter in a good state (clean SuperPMI replay with APX on) before we start to improve the code quality?

p.p.s More explanation for the third fix:
When doing code generating for ShftRotate and Mul, there are some optimizations that BMI instructions will be used. Without BMI instructions, Shiftrotate and Mul nodes will be mapped to legacy instructions so EVEX is not required for EGPR access since APX provides REX2, but if there are optimizations that these nodes will be mapped to BMI instructions, EVEX is required, so we choose a conservative strategy and mask out EGPRs in register allocator for these nodes when EVEX is not available.

[dotnet-policy-service]

Tagging subscribers to this area: @JulieLeeMSFT, @jakobbotsch
See info in area-owners.md if you want to be subscribed.

[Ruihan-Yin]

Hi @tannergooding, while waiting for the CI, would you please share some thoughts on this, shall we fix this bug first before I start to work on #117326? Thanks!

[Copilot]

Pull Request Overview

This PR fixes two APX emitter bugs related to instruction encoding: correcting LEA encoding and disabling EVEX compressed displacement for APX extended EVEX instructions. The changes address issues where APX extended EVEX instructions were incorrectly applying compressed displacement optimization, which could enable unexpected features since these instructions have a constant scaling factor of 1.

• Adds tuple type information checks to prevent compressed displacement optimization on APX extended EVEX instructions
• Fixes LEA encoding by adding the X86 prefix when needed
• Updates displacement handling logic to properly differentiate between original EVEX and extended EVEX instructions

[Ruihan-Yin]

The displacement bug introduced code size regression due to unnecessary promoting legacy instructions to EVEX when APX is on (the base is main, diff is with bug fix, so the diff shows green.)

[Ruihan-Yin]

Failures should be unrelated timeout error. PR is ready for review. c.c @dotnet/intel

[Ruihan-Yin]

Hi @tannergooding, we have a few bug fixes for APX, this PR is expected to target on RC1, please take a look, thanks!
c.c @EgorBo

[Ruihan-Yin]

Thanks for the quick response!