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Add support for the SDMMC clock bypass feature for those SoCs that have
it. This provides a SDMMC bus speed double that of clk-div = <0>.

Updated the clk-div documentation at the same time to be clearer on
how the bus clock speed is determined.

Explicitly initialise the SDMMC initialisation struct to make it clear
the configuration being applied.

Signed-off-by: Jordan Yates <[email protected]>
Add support for the SDMMC clock bypass feature for those SoCs that have
it. This provides a SDMMC bus speed double that of `clk-div = <0>`.

Updated the `clk-div` documentation at the same time to be clearer on
how the bus clock speed is determined.

Signed-off-by: Jordan Yates <[email protected]>
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@JordanYates JordanYates added this to the v4.2.0 milestone Jun 14, 2025
@danieldegrasse danieldegrasse modified the milestones: v4.2.0, v4.3.0 Jul 14, 2025
@kartben kartben merged commit 827da4a into zephyrproject-rtos:main Aug 18, 2025
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@JordanYates JordanYates deleted the 250613_sdmcc_clk_bypass branch August 18, 2025 22:32
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5 participants